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XSD202

Description
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,
CategoryDiscrete semiconductor    The transistor   
File Size23KB,2 Pages
ManufacturerSIPEX
Websitehttp://www.sipex.com/
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XSD202 Overview

Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,

XSD202 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSIPEX
Reach Compliance Codeunknown
ConfigurationSingle
Maximum drain current (Abs) (ID)0.05 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
Operating modeENHANCEMENT MODE
Maximum operating temperature125 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.3 W
surface mountYES

XSD202 Preview

CORPORATION
High-Speed Analog
N-Channel Enhancement-Mode
DMOS FETS
SD200 / SD201 / SD202 / SD203 / SSTSD201 / SSTSD203
FEATURES
High gain . . . . . . . . . . . . . . . . . . . . . 8.0 dB min @ 1 GHz
Low Noise. . . . . . . . . . . . . . . . . . . . . 5.0 dB max @ 1 GHz
(SD202, SD203, SSTSD203)
Low Interelectrode Capacitances
DESCRIPTION
The SD200 series is manufactured utilizing Calogic’s
proprietary DMOS design and processing techniques. The
device is designed to operate well through 1 GHz while
maintaining excellent frequency response, power gain, and
low noise. The DMOS structure is an inherently low
capacitance and very high speed design resulting in a device
that bridges JFETS and GaAs products in performance
characteristics.
ORDERING INFORMATION
Part
SD200DC
SD201DC
SD202DC
SD203DC
SSTSD201
SSTSD203
XSD200
XSD201
XSD202
XSD203
Package
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
Surface Mount SOT-143
Surface Mount SOT-143
Sorted Chips in Carriers
Sorted Chips in Carriers
Sorted Chips in Carriers
Sorted Chips in Carriers
SCHEMATIC DIAGRAM
Temperature Range
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
APPLICATIONS
High Gain VHF/UHF Amplifiers
Oscillators
Mixers
PIN CONFIGURATION
(2)
DRAIN
(4)
CASE, BODY
CD10-1
CD10-2
G
D
CASE, B
S
SD201, SD203, zener protected
SD202, SD204, non-zener
(3)
GATE
(1)
SOURCE
GATE (3)
DRAIN (2)
PART MARKINGS (SOT-143)
P/N
MARKING
201
203
BODY INTERNALLY CONNECTED TO CASE.
DIODE PROTECTION ON SD201/SD203 ONLY.
BODY (4)
SOT-143
SOURCE (1)
SSTSD201
SSTSD203
SD200 / SD201 / SD202 / SD203 / SSTSD201 / SSTSD203
CORPORATION
ABSOLUTE MAXIMUM RATING
(T
A
= +25
o
C unless otherwise noted)
PARAMETER
Breakdown
Voltages
V
DS
V
DB
V
GS
V
GB
V
GD
SD200 SD201 SD202 SD203
UNIT
I
D
P
T
P
D
T
j
T
s
Continuous Drain Current . . . . . . . . . . . . . . . . . . 50 mA
Power Dissipation (at or below T
C
= +25
o
C) . . . . 1.8 W
Linear Derating Factor . . . . . . . . . . . . . . . . . 18 mW/
o
C
Power Dissipation (at or below T
A
= +25C) . . . 360 mW
Linear Derating Factor . . . . . . . . . . . . . . . . . 3.6 mW/
o
C
Operating Junction
Temperature Range . . . . . . . . . . . . . . -55
o
C to + 125
o
C
Storage Temperature Range . . . . . . . . -65
o
C to +175
o
C
+25
+25
±40
±40
±40
+25
+25
-0.3
+20
-0.3
+20
-0.3
+20
+20
+20
±40
±40
±40
+20
+20
-0.3
+20
-0.3
+20
-0.3
+20
V
V
V
V
V
V
V
V
ELECTRICAL CHARACTERISTICS (T
A
= +25
o
C unless otherwise noted)
200, 201
SYMBOL
PARAMETER
MIN
STATIC
BV
DS
BV
DB
Drain-Source Breakdown Voltage
Drain-Body Breakdown Voltage
Drain-Source
OFF Current
SD200
Gate-Body
Leakage
Current
SD202
SD201
SD203
V
GS(th
)
r
DS(ON)
DYNAMIC
g
fs
c
iss
c
oss
c
rss
G
ps
NF
P
i
Common-Source Forward
Transcondconductance
Common-Source Input Capacitance
Common-Source Output Capacitance
Common-Source
Reverse Transfer Capacitance
Common-Source Power Gain
Noise Figure
Intercept Point
8.0
13
14
2.4
1.0
0.2
10
4.5
29
6.0
3.0
1.2
0.3
8.0
17
20
3.0
1.0
0.2
10
dB
4.0
29
5.0
dBm
∆f
= 2 MHz
3.6
1.2
0.3
V
DS
= 15 V
f = 1 GHz
ID = 20 mA
V
SB
= 0
pF
V
GS
= 0
mS
I
D
= 20 mA, V
DS
= 15 V
f = 1 KHz, V
SB
= 0
I
D
= 20 mA
V
DS
= 15 V
f = 1 MHz
V
SB
= 0
Gate Threshold Voltage
Drain-Source ON Resistance
0.1
1.0
40
2.0
70
0.1
1.0
35
1.0
1.0
2.0
50
V
ohms
V
DS
= V
GS
, I
D
= 1µA, V
SB
= 0
V
GS
= 5 V, I
D
= 1 mA, V
SB
= 0
25
25
1.0
1.0
±0.1
±0.1
µA
nA
30
20
20
25
V
V
I
D
= 1.0µA, V
GS
= V
BS
= 0
I
D
= 1.0µA, V
GB
= 0
Source OPEN
V
DS
= 25 V
V
GS
= V
BS
= 0
V
DS
= 20 V
V
GV
=
±40
V
V
DB
= V
SB
= 0
V
GB
= 20 V
TYP
MAX
MIN
TYP
MAX
202, 203
UNIT
TEST CONDITIONS
I
D(OFF)
I
GBS
µA

XSD202 Related Products

XSD202
Description Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,
Is it Rohs certified? incompatible
Maker SIPEX
Reach Compliance Code unknown
Configuration Single
Maximum drain current (Abs) (ID) 0.05 A
FET technology METAL-OXIDE SEMICONDUCTOR
Operating mode ENHANCEMENT MODE
Maximum operating temperature 125 °C
Polarity/channel type N-CHANNEL
Maximum power dissipation(Abs) 0.3 W
surface mount YES

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