WS128K32N-35H1Q datasheet, PDF

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WS128K32N-35H1Q: DescriptionSRAM Module, 128KX32, 35ns, CMOS, CHIP66, HERMETIC SEALED, CERAMIC, HIP-66; Categorystorage storage; File Size157KB，9 Pages; ManufacturerWhite Microelectronics

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WS128K32N-35H1Q Overview

SRAM Module, 128KX32, 35ns, CMOS, CHIP66, HERMETIC SEALED, CERAMIC, HIP-66

WS128K32N-35H1Q Parametric

Parameter Name	Attribute value
Maker	White Microelectronics
package instruction	HERMETIC SEALED, CERAMIC, HIP-66
Reach Compliance Code	unknown
Maximum access time	35 ns
Other features	USER CONFIGURABLE AS 512K X 8
Spare memory width	16
JESD-30 code	S-CHIP-P66
memory density	4194304 bit
Memory IC Type	SRAM MODULE
memory width	32
Number of functions	1
Number of ports	1
Number of terminals	66
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX32
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	SQUARE
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	PIN/PEG
Terminal location	HEX

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WS128K32-XXX

HI-RELIABILITY PRODUCT

128Kx32 SRAM MODULE, SMD 5962-93187 & 5962-95595

FEATURES

Access Times of 15, 17, 20, 25, 35, 45, 55ns

MIL-STD-883 Compliant Devices Available

Packaging

• 66 pin, PGA Type, 1.075" square, Hermetic Ceramic

HIP (Package 400)

• 68 lead, 40mm CQFP (G4T), 3.56mm (0.140")

(Package 502).

• 68 lead, 22.4mm CQFP (G2T), 4.57mm (0.180"),

(Package 509)

• 68 lead, 22.4mm Low Profile CQFP (G1U), 3.57mm

(0.140"), (Package 519)

Organized as 128Kx32; User Configurable as 256Kx16

or 512Kx8

Low Power Data Retention - only available in G2T

package type

Commercial, Industrial and Military Temperature

Ranges

5 Volt Power Supply

Low Power CMOS

TTL Compatible Inputs and Outputs

Built in Decoupling Caps and Multiple Ground Pins for

Low Noise Operation

Weight:

WS128K32-XG1UX - 5 grams typical

WS128K32-XG2TX - 8 grams typical

WS128K32-XH1X - 13 grams typical

WS128K32-XG4TX - 20 grams typical

All devices are upgradeable to 512Kx32

FIG. 1

PIN CONFIGURATION FOR WS128K32N-XH1X

PIN DESCRIPTION

I/O

GND

I/O

TOP VIEW

I/O

GND

I/O

0-31

Data Inputs/Outputs

0-16

1-4

GND

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

Not Connected

BLOCK DIAGRAM

0-16

128K x 8

I/O

128K x 8

I/O

0-7

I/O

8-15

I/O

16-23

I/O

24-31

January 2001 Rev. 7

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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