EEWORLDEEWORLDEEWORLD

Part Number

Search

HS1-26C32RH-T

Description
QUAD LINE RECEIVER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size254KB,3 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance  
Related ProductsFound10parts with similar functions to HS1-26C32RH-T
Download Datasheet Parametric Compare View All

HS1-26C32RH-T Overview

QUAD LINE RECEIVER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16

HS1-26C32RH-T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeDIP
package instructionDIP, DIP16,.3
Contacts16
Reach Compliance Codecompliant
ECCN codeEAR99
Input propertiesDIFFERENTIAL SCHMITT TRIGGER
Interface integrated circuit typeLINE RECEIVER
Interface standardsEIA-422
JESD-30 codeR-CDIP-T16
JESD-609 codee3
Number of functions4
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Maximum output low current0.006 A
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum receive delay
Number of receiver bits4
Filter levelMIL-PRF-38535 Class T
Maximum seat height5.08 mm
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose100k Rad(Si) V
width7.62 mm

HS1-26C32RH-T Preview

DATASHEET
HS-26C32RH-T
Radiation Hardened Quad Differential Line Receiver
Intersil’s Satellite Applications Flow™ (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large volume
satellite manufacturers, while maintaining a high level of
reliability.
The Intersil HS-26C32RH-T is a Quad Differential Line
Receiver designed for digital data transmission over
balanced lines and meets the requirements of EIA Standard
RS-422. Radiation Hardened CMOS processing assures low
power consumption, high speed, and reliable operation in
the most severe radiation environments.
The HS-26C32RH-T has an input sensitivity of 200mV (typ).
over the common mode input voltage range of
7V.
The
receivers are also equipped with input fail safe circuitry,
which causes the outputs to go to a logic “1” when the inputs
are open. Enable and Disable functions are common to all
four receivers.
FN4592
Rev 2.00
August 1, 2008
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose . . . . . . . . . . . . . . . . . . . . 1 x 10
5
RAD(Si)
- SEU and SEL . . . . . . . . . . Immune to 100MeV/mg/cm
2
• EIA RS-422 Compatible Inputs
• CMOS Compatible Enable Inputs
• Input Fail Safe Circuitry
• High Impedance Inputs when Disabled or Powered Down
• Low Power Dissipation 138mW Standby (Max)
• Single 5V Supply
• Full -55°C to +125°C Military Temperature Range
Applications
• Line Receiver for MIL-STD-1553 Serial Data Bus
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-26C32RH-T
are contained in SMD 5962-95689.
A “hot-link” is provided
from our website for downloading.
http://www.intersil.com/military/
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
http://rel.intersil.com/reports/search.php
Functional Diagram
ENABLE
ENABLE DIN DIN
CIN CIN
BIN BIN
AIN AIN
+
-
+
-
+
-
+
-
DOUT
COUT
BOUT
AOUT
Ordering Information
ORDERING NUMBER
5962R9568901TEC
HS1-26C32RH/PROTO
5962R9568901TXC
HS9-26C32RH/PROTO
INTERNAL MKT. NUMBER
HS1-26C32RH-T
HS1-26C32RH/PROTO
HS9-26C32RH-T
HS9-26C32RH/PROTO
PART MARKING
Q 5962R95 68901TEC
HS1- 26C32RH /PROTO
Q 5962R95 68901TXC
HS9- 26C32RH /PROTO
TEMP. RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
PACKAGE
16 Ld SBDIP
16 Ld SBDIP
PKG. DWG. #
D16.3
D16.3
16 Ld FLATPACK K16.A
16 Ld FLATPACK K16.A
NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct.
FN4592 Rev 2.00
August 1, 2008
Page 1 of 3
HS-26C32RH-T
s
Pinouts
HS1-26C32RH-T
(16 LD SBDIP, CDIP2-T16)
TOP VIEW
AIN 1
AIN 2
AOUT 3
ENABLE 4
COUT 5
CIN 6
CIN 7
GND 8
16 V
DD
15 BIN
14 BIN
13 BOUT
12 ENABLE
11 DOUT
10 DIN
9 DIN
AIN
AIN
AOUT
ENABLE
COUT
CIN
CIN
GND
HS9-26C32RH-T
(16 LD FLATPACK, CDFP4-F16)
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
BIN
BIN
BOUT
ENABLE
DOUT
DIN
DIN
TABLE 1. TRUTH TABLE
INPUTS
DEVICE
POWER
ON/OFF
OUTPUT
ENABLE
ENABLE
INPUT
OUT
ON
0
1
X
HI-Z
ON
1
X
VID
VTH
(Max)
1
ON
1
X
VID
VTH
(Min)
0
ON
X
0
VID
VTH (Max)
1
ON
X
0
VID
VTH (Min)
0
ON
1
X
Open
1
ON
X
0
Open
1
© Copyright Intersil Americas LLC 2002-2008. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see
www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at
www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see
www.intersil.com
FN4592 Rev 2.00
August 1, 2008
Page 2 of 3
HS-26C32RH-T
Die Characteristics
DIE DIMENSIONS:
2140µm x 3290µm x 533m
25.4µm
(85 x 130 x 21mils
1mil)
METALLIZATION:
M1: Mo/Tiw
Thickness: 5800
Å
M2: Al/Si/Cu
Thickness: 10k
Å
1k
Å
SUBSTRATE POTENTIAL:
Internally connected to V
DD
. May be left floating.
BACKSIDE FINISH:
Silicon
PASSIVATION:
Type: SiO
2
Thickness: 8k
Å
1k
Å
WORST CASE CURRENT DENSITY:
< 2.0e5 A/cm
2
TRANSISTOR COUNT:
315
PROCESS:
Radiation Hardened CMOS, AVLSI
Metallization Mask Layout
HS-26C32RH
AIN
(1)
V
DD
(16)
BIN
(15)
AIN (2)
(14) BIN
AOUT (3)
(13) BOUT
ENAB (4)
(12) ENAB
COUT (5)
(11) DOUT
CIN (6)
(10) DIN
(7)
CIN
(8)
GND
(9)
DIN
FN4592 Rev 2.00
August 1, 2008
Page 3 of 3

HS1-26C32RH-T Related Products

HS1-26C32RH-T HS9-26C32RH-T
Description QUAD LINE RECEIVER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 QUAD LINE RECEIVER, CDFP16, CERAMIC, DFP-16
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DIP DFP
package instruction DIP, DIP16,.3 DFP, FL16,.3
Contacts 16 16
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Input properties DIFFERENTIAL SCHMITT TRIGGER DIFFERENTIAL SCHMITT TRIGGER
Interface integrated circuit type LINE RECEIVER LINE RECEIVER
Interface standards EIA-422 EIA-422
JESD-30 code R-CDIP-T16 R-CDFP-F16
Number of functions 4 4
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Maximum output low current 0.006 A 0.006 A
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP DFP
Encapsulate equivalent code DIP16,.3 FL16,.3
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE FLATPACK
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V
Certification status Not Qualified Not Qualified
Number of receiver bits 4 4
Filter level MIL-PRF-38535 Class T MIL-PRF-38535 Class T
Maximum seat height 5.08 mm 2.92 mm
Nominal supply voltage 5 V 5 V
surface mount NO YES
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal form THROUGH-HOLE FLAT
Terminal pitch 2.54 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
total dose 100k Rad(Si) V 100k Rad(Si) V
width 7.62 mm 6.73 mm

HS1-26C32RH-T Similar Products

Part Number Manufacturer Description
AM26C32CNE4 Texas Instruments(德州仪器) Quadruple Differential Line Receiver 16-PDIP 0 to 70
SN75ALS173N Texas Instruments(德州仪器) Quadruple Differential Line Receiver 16-PDIP 0 to 70
AM26C32MJB Texas Instruments(德州仪器) Quadruple Differential Line Receiver 16-CDIP -55 to 125
AM26C32CN Texas Instruments(德州仪器) Quadruple Differential Line Receiver 16-PDIP 0 to 70
AM26C32IN Texas Instruments(德州仪器) Quadruple Differential Line Receiver 16-PDIP -40 to 85
DS26C32AMJ/883 Texas Instruments(德州仪器) CMOS Quad Differential Line Receivers 16-CDIP -55 to 125
DS96F173MJ/883 Texas Instruments(德州仪器) EIA-485/EIA-422 Quad Differential Receivers 16-CDIP -55 to 125
5962-9164001MEX Texas Instruments(德州仪器) QUAD LINE RECEIVER, CDIP16, CERDIP-16
DS96F173MJ Rochester Electronics QUAD LINE RECEIVER, CDIP16, CERDIP-16
5962-9164001MEA Texas Instruments(德州仪器) CMOS Quad Differential Line Receivers 16-CDIP -55 to 125
How to modify the servo arm? ! ! Please help! !
I want to put some magnets on the servo, but it is useless to print a lot of through-hole modification parts. Do I have to make a shell for the original one and then make a platform based on it? ?...
77不犹豫 Innovation Lab
Can you guys give me some suggestions, and diagrams?
The area encircled by the red circle needs to be monitored. The area is very large, and there is no wire or electricity. The signal will eventually be transmitted to the location marked with the red d...
Domingo Security Electronics
Zeng Jianqiu: China Mobile should pay attention to six major issues in the future
As a professor at the School of Economics and Management of Beijing University of Posts and Telecommunications and director of the Center for Competitiveness and IT Economics, Dr. Zeng Jianqiu believe...
bob RF/Wirelessly
The running light delay is realized by the single-chip timer, and the running light style is changed by external interrupt
The timer is used to delay the running light, and the external interruption is used to change the running light style. There are two styles: (1) 4 LEDs are lit alternately in a group, with a delay of ...
2575199550 51mcu
Implementation of a Super-resolution Direction Finding Algorithm for Spatial Spectrum Estimation Based on High-speed DSP Series Processors
Spatial spectrum estimation super-resolution is a spatial processing technology with superior spatial parameter (such as azimuth) estimation performance. Spatial spectrum estimation is an important br...
灞波儿奔 DSP and ARM Processors
Design of a neural signal conditioning circuit
The human body's neural signals directly represent the human body's self-meaning. Studying neural signals provides a way to understand and identify the human body. For many years. At present, the rese...
rain Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号