SUPPLEMENT
Am29BDD160G Known Good Die—Die Revision 1
16 Megabit (1 M x 16-Bit/512 K x 32-Bit)
CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURE ADVANTAGES
■
Ultra low power consumption
— Burst Mode Read: 90 mA @ 56 MHz max
— Program/Erase: 50 mA max
— Standby mode: CMOS: 250 µA max
■
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Zero latency between read and write operations
— Two bank architecture: 75%/25%
■
User-Defined x16 or x32 Data Bus
■
Dual Boot Block
— Top and bottom boot in the same device
■
Minimum 1 million write cycles guaranteed per sector
■
20 year data retention at 125°C
■
VersatileI/O™ control
— Device generates data output voltages and tolerates data
input voltages as determined by the voltage on the V
IO
pin
— 1.65 V to 2.75 V compatible I/O signals
■
Flexible sector architecture
— Eight 8 Kbytes, thirty 64 Kbytes, and eight 8 Kbytes
sectors
SOFTWARE FEATURES
■
Manufactured on 0.17 µm process technology
■
SecSi (Secured Silicon) Sector (256 Bytes)
—
Factory locked and identifiable:
16 bytes for secure,
random factory Electronic Serial Number; remainder may
be customer data programmed by AMD
—
Customer lockable:
Can be read, programmed or erased
just like other sectors. Once locked, data cannot be
changed
■
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector
(requires only V
CC
levels)
■
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector
using a user-definable 64-bit password
■
Programmable Burst interface
— Interface to any high performance processor
— Modes of Burst Read Operation:
—
Linear Burst:
4 double words (x32), 8 words (x16) and
double words (x32), and 32 words (x16) with wrap
around
■
Supports Common Flash Interface (CFI)
■
Unlock Bypass Program Command
— Reduces overall programming time when issuing multiple
program command sequences
■
Single power supply operation
— Optimized for 2.5 to 2.75 Volt read, erase, and program
operations
■
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
■
Compatibility with JEDEC standards (JC42.4)
— Software compatible with single-power supply Flash
— Backward-compatible with AMD Am29LV and Am29F
flash memories
HARDWARE FEATURES
■
Program Suspend/Resume & Erase Suspend/Resume
— Suspends program or erase operations to allow reading,
programming, or erasing in same bank
PERFORMANCE CHARACTERISTICS
■
Hardware Reset (RESET#), Ready/Busy# (RY/BY#),
and Write Protect (WP#) inputs
■
ACC input
— Accelerates programming time for higher throughput
during system production
■
High performance read access
— Initial/random access times as fast as 64 ns
— Burst access time as fast as 10 ns
■
Quality and reliability levels equivalent to standard
packaged components
Publication#
26994
Rev:
A
Amendment/2
Issue Date:
May 9, 2003
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29BDD160G in Known Good Die (KGD) form is
an 16 Mbit, 2.5 volt-only Flash memory. AMD defines
KGD as standard product in die form, tested for function-
ality and speed. AMD KGD products have the same reli-
ability and quality as AMD products in packaged form.
WP# Hardware Protection feature is always available,
independent of the other protection method chosen.
The
VersatileI/O™ (V
CCQ
)
feature allows the output
voltage generated on the device to be determined
based on the V
IO
level. This feature allows this device
to operate in the 1.8 V I/O environment, driving and re-
ceiving signals to and from other 1.8 V devices on the
same bus. In addition, inputs and I/Os that are driven
externally are capable of handling 3.6 V.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, by reading the DQ7 (Data# Polling), or DQ6 (tog-
gle)
status bits.
After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The
sector erase architecture
allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
password and
software sector protection
feature disables both
program and erase operations in any combination of
sectors of memory. This can be achieved in-system at
V
CC
level.
The
Program/Erase Suspend/Erase Resume
fea-
ture enables the user to put erase on hold for any pe-
riod of time to read data from, or program data to, any
sector that is not selected for erasure. True back-
ground erase can thus be achieved.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consumption is greatly re-
duced in both these modes.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron injec-
tion.
Am29BDD160G Features
The Am29BDD160G is a 16 Megabit, 2.5 Volt-only sin-
gle power supply burst mode flash memory device.
The device can be configured for either 1,048,576
words in 16-bit mode or 524,288 double words in 32-
bit mode. The device can also be programmed in stan-
dard EPROM programmers. The device offers a con-
figurable burst interface to 16/32-bit microprocessors
and microcontrollers.
To eliminate bus contention, each device has separate
chip enable (CE#), write enable (WE#) and output en-
able (OE#) controls. Additional control inputs are re-
quired for synchronous burst operations: Load Burst
Address Valid (ADV#), and Clock (CLK).
Each device requires only a
single 2.5 or 2.6 Volt
power supply
(2.5 V to 2.75 V) for both read and write
functions. A 12.0-volt V
PP
is not required for program
or erase operations, although an acceleration pin is
available if faster programming performance is re-
quired.
The device is entirely command set compatible with
the
JEDEC single-power-supply Flash standard.
The
Unlock Bypass
mode facilitates faster program-
ming times by requiring only two write cycles to pro-
gram data instead of four.
The
Simultaneous Read/Write architecture
provides
simultaneous operation by dividing the memory space
into two banks. The device can begin programming or
erasing in one bank, and then simultaneously read
from the other bank, with zero latency.
The device provides a 256-byte
SecSi™ (Secured
Silicon) Sector
with an one-time-programmable
(OTP) mechanism.
In addition, the device features several levels of sector
protection, which can disable both the program and
erase operations in certain sectors or sector groups:
Persistent Sector Protection
is a command sector
protection method that replaces the old 12 V con-
trolled protection method;
Password Sector Protec-
tion
is a highly sophisticated protection method that
requires a password before changes to certain sectors
or sector groups are permitted;
WP# Hardware Pro-
tection
prevents program or erase in the two outer-
most 8 Kbytes sectors of the larger bank.
The device defaults to the Persistent Sector Protection
mode. The customer must then choose if the Standard
or Password Protection method is most desirable. The
Electrical Specifications
Refer to the Am29BDD160G data sheet, publication
number 24960, for full electrical specifications on the
Am29BDD160G in KGD form.
2
Am29BDD160G Known Good Die—Die Revision 1
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