V53C104HP55 datasheet, PDF - EEWORLD Datasheet

V53C104HP55: DescriptionULTRA-HIGH PERFORMANCE, LOW POWER 256K X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM; Categorystorage storage; File Size928KB，16 Pages; ManufacturerMosel Vitelic Corporation ( MVC ); Websitehttp://www.moselvitelic.com

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V53C104HP55 Overview

ULTRA-HIGH PERFORMANCE, LOW POWER 256K X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Mosel Vitelic Corporation ( MVC )
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	FAST PAGE
Maximum access time	55 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
memory density	1048576 bi
Memory IC Type	FAST PAGE DRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	20
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX4
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	4.572 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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