Cache SRAM, 8KX16, 25ns, CMOS, PQCC52, PLASTIC, LCC-52
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Hitachi （Renesas ） |
| Parts packaging code | LCC |
| package instruction | QCCJ, LDCC52,.8SQ |
| Contacts | 52 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Maximum access time | 25 ns |
| Other features | ADDRESS LATCH |
| I/O type | COMMON |
| JESD-30 code | S-PQCC-J52 |
| JESD-609 code | e0 |
| length | 19.1262 mm |
| memory density | 131072 bit |
| Memory IC Type | CACHE SRAM |
| memory width | 16 |
| Number of functions | 1 |
| Number of terminals | 52 |
| word count | 8192 words |
| character code | 8000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 8KX16 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC52,.8SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| power supply | 5 V |
| Certification status | Not Qualified |
| Maximum seat height | 4.57 mm |
| Maximum standby current | 0.22 A |
| Minimum standby current | 4.75 V |
| Maximum slew rate | 0.22 mA |
| Maximum supply voltage (Vsup) | 5.25 V |
| Minimum supply voltage (Vsup) | 4.75 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| width | 19.1262 mm |
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