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Datasheet> All Categories > Analog mixed-signal IC> Drivers and interfaces> MAX9171EKA-T
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MAX9171EKA-T

Description
LINE RECEIVER, PDSO8, MO-178BA, SOT-23, 8 PIN
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size972KB，13 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
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MAX9171EKA-T Overview

LINE RECEIVER, PDSO8, MO-178BA, SOT-23, 8 PIN

MAX9171EKA-T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?incompatible
MakerRochester Electronics
Parts packaging codeSOIC
package instructionMO-178BA, SOT-23, 8 PIN
Contacts8
Reach Compliance Codeunknown
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsEIA-644; TIA-644
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length2.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeLSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)245
Maximum receive delay2.5 ns
Number of receiver bits1
Maximum seat height1.45 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1.625 mm

MAX9171EKA-T Preview

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19-2578; Rev 2; 6/07
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
General Description
The MAX9171/MAX9172 single/dual low-voltage differential
signaling (LVDS) receivers are designed for high-speed
applications requiring minimum power consumption,
space, and noise. Both devices support switching rates
exceeding 500Mbps while operating from a single 3.3V
supply.
The MAX9171 is a single LVDS receiver and the
MAX9172 is a dual LVDS receiver. Both devices con-
form to the ANSI TIA/EIA-644 LVDS standard and con-
vert LVDS to LVTTL/LVCMOS-compatible outputs. A
fail-safe feature sets the outputs high when the inputs
are undriven and open, terminated, or shorted. The
MAX9171/MAX9172 are available in 8-pin SO packages
and space-saving thin DFN and SOT23 packages.
For lower skew devices, refer to the MAX9111/ MAX9113
data sheet.
o
Input Accepts LVDS and LVPECL
o
In-Path Fail-Safe Circuit
o
Space-Saving 8-Pin TDFN and SOT23 Packages
o
Fail-Safe Circuitry Sets Output High for Open,
Undriven Shorted, or Undriven Terminated Output
o
Flow-Through Pinout Simplifies PCB Layout
o
Guaranteed 500Mbps Data Rate
o
Second Source to DS90LV018A and DS90LV028A
(SO Packages Only)
o
Conforms to ANSI TIA/EIA-644 Standard
o
3.3V Supply Voltage
o
-40°C to +85°C Operating Temperature Range
o
Low-Power Dissipation
Features
MAX9171/MAX9172
Applications
Multipoint Backplane Interconnect
Laser Printers
Digital Copiers
Cellular Phone Base Stations
LCD Displays
Network Switches/Routers
Clock Distribution
PART
MAX9171EKA-T
MAX9171ESA
MAX9171ETA*
MAX9172EKA-T
MAX9172ESA
MAX9172ETA*
Ordering Information
PIN-PACKAGE
8 SOT23-8
8 SO
8 Thin DFN-EP**
8 SOT23-8
8 SO
8 Thin DFN-EP**
TOP
MARK
AALX
—
—
AALY
—
—
PKG
CODE
K8-1
S8-2
T833-2
K8-1
S8-2
T833-2
Note:
All devices are specified over the -40°C to +85°C operating
temperature range.
*Future
product—contact factory for availability.
**EP
= Exposed pad.
T = Tape-and-reel.
Pin Configurations
MAX9171
V
CC
GND
OUT
N.C.
MAX9171
MAX9172
MAX9172
IN- 1
IN+ 2
N.C. 3
N.C. 4
8 V
CC
7 OUT
6 N.C.
5 GND
1
2
3
4
8 IN-
7 IN+
6 N.C.
5 N.C.
IN1- 1
IN1+ 2
IN2+ 3
IN2- 4
8 V
CC
7 OUT1
6 OUT2
5 GND
V
CC
1
GND 2
OUT1 3
OUT2 4
8 IN1-
7 IN1+
6 IN2+
5 IN2-
SO/TDFN*
SOT23
SO/TDFN*
SOT23
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
MAX9171/MAX9172
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.0V
IN_+, IN_- to GND .................................................-0.3V to +4.0V
OUT_ to GND ............................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C) ...........714mW
8-Pin SO (derate 5.9mW/°C above +70°C) .................471mW
8-Pin TDFN (derate 24.4mW/°C above +70°C) ........1951mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
ESD Protection
Human Body Model (IN_+, IN_-) ...................................±13kV
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 1.2V, receiver input voltage = 0 to V
CC
, common-mode voltage V
CM
=
|V
ID
/2| to (V
CC
- |V
ID
/2|), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= 3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
PARAMETER
LVDS INPUTS (IN_+, IN_-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current (Noninverting Input)
Power-Off Input Current
(Noninverting Input)
Input Current (Inverting Input)
Power-Off Input Current
(Inverting Input)
LVCMOS/LVTTL OUTPUTS (OUT_)
Output High Voltage
Output Low Voltage
Output Short-Circuit Current
POWER SUPPLY
Supply Current
I
CC
Inputs open
MAX9171
MAX9172
3.6
7.0
6
9
mA
V
OH
V
OL
I
OS
Open, undriven short, or
I
OH
= -4.0mA undriven parallel termination
V
ID
= 0V
I
OL
= 4.0mA, V
ID
= -100mV
V
OUT_
= 0 (Note 3)
-45
2.7
2.7
3.2
3.2
0.1
-77
0.4
-120
V
mA
V
V
TH
V
TL
I
IN+
I
IN+OFF
I
IN-
I
IN-OFF
Figure 1
Figure 1
Figure 1
V
IN+
= 0 to 3.6V, V
IN-
= 0 to 3.6V, V
CC
= 0
or open (Figure 1)
Figure 1
V
IN+
= 0 to 3.6V, V
IN-
= 0 to 3.6V, V
CC
= 0
or open (Figure 1)
-100
+0.5
-0.5
-0.5
-0.5
-40
-40
-2.1
0
+4.4
0
-5.0
+0.5
+10.0
+0.5
0
mV
mV
µA
µA
µA
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
SWITCHING CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, C
L
= 15pF, |V
ID
| = 0.2V, V
CM
= 1.2V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
=
3.3V, T
A
= +25°C.) (Notes 4, 5, 6)
PARAMETER
Differential Propagation Delay
High to Low
Differential Propagation Delay
Low to High
Differential Pulse Skew
|t
PHLD
- t
PLHD
|
Differential Channel-to-Channel
Skew (MAX9172)
Differential Part-to-Part Skew
Rise Time
Fall Time
Maximum Operating Frequency
SYMBOL
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
f
MAX
Figures 2, 3
Figures 2, 3
Figures 2, 3 (Note 7)
Figures 2, 3 (Note 8)
Figures 2, 3 (Note 9)
Figures 2, 3 (Note 10)
Figures 2, 3
Figures 2, 3
All channels switching, V
OL(MAX)
= 0.4V,
V
OH(MIN)
= 2.7V, 40% < duty cycle < 60%
250
0.55
0.51
300
CONDITIONS
MIN
1.0
1.0
TYP
1.65
1.62
30
40
MAX
2.5
2.5
400
500
1
1.5
0.8
0.8
UNITS
ns
ns
ps
ps
ns
ns
ns
MHz
MAX9171/MAX9172
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to GND
except V
TH
, V
TL
, and V
ID
.
Note 2:
All devices are 100% production tested at T
A
= +25°C and are guaranteed by design for T
A
= -40°C to +85°C, as specified.
Note 3:
Short only one output at a time. Do not exceed the absolute maximum junction temperature specification.
Note 4:
AC parameters are guaranteed by design and not production tested.
Note 5:
C
L
includes scope probe and test jig capacitance.
Note 6:
Pulse generator output conditions: t
R
= t
F
< 1ns (0% to 100%), frequency = 250MHz, 50% duty cycle, V
OH
= 1.3V, V
OL
= 1.1V.
Note 7:
t
SKD1
is the magnitude of the difference of differential propagation delays in a channel. t
SKD1
= |t
PHLD
- t
PLHD
|.
Note 8:
t
SKD2
is the magnitude of the difference of the t
PLHD
or t
PHLD
of one channel and the t
PLHD
or t
PHLD
of the other channel on
the same part.
Note 9:
t
SKD3
is the magnitude of the difference of any differential propagation delays between parts at the same V
CC
and within
5°C of each other.
Note 10:
t
SKD4
is the magnitude of the difference of any differential propagation delays between parts operating over the rated
supply and temperature ranges.
_______________________________________________________________________________________
3
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
MAX9171/MAX9172
Typical Operating Characteristics
(V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.2V, f
IN
= 200MHz, C
L
= 15pF, T
A
= +25°C, unless otherwise specified.)
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
MAX9171 toc01
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9171 toc02
OUTPUT SHORT-CIRCUIT CURRENT
vs. SUPPLY VOLTAGE
OUTPUT SHORT-CIRCUIT CURRENT (mA)
V
ID
= +200mV, OUTPUT
SHORTED TO GROUND
-70
MAX9171 toc03
3.6
I
OH
= -4mA
3.5
OUTPUT HIGH VOLTAGE (V)
3.4
3.3
3.2
3.1
3.0
2.9
3.0
3.1
3.2
3.3
3.4
3.5
100
I
OL
= +4mA
OUTPUT LOW VOLTAGE (mV)
95
-65
90
-75
85
-80
80
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
-85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
DIFFERENTIAL THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
MAX9171 toc04
MAX9172 SUPPLY CURRENT
vs. FREQUENCY
MAX9171 toc05
MAX9172 SUPPLY CURRENT
vs. TEMPERATURE
f = 1MHz
BOTH CHANNELS SWITCHING
SUPPLY CURRENT (mA)
MAX9171 toc06
-35
DIFFERENTIAL THRESHOLD VOLTAGE (mV)
40
9
SUPPLY CURRENT (mA)
-40
HIGH-LOW
-45
30
8
20
BOTH CHANNELS
SWITCHING
7
-50
LOW-HIGH
10
ONE CHANNEL
SWITCHING
-55
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
0
0.1
1
6
10
FREQUENCY (MHz)
100
1000
-40
-15
10
35
60
85
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9171 toc07
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
DIFFERENTIAL PROPAGATION DELAY (ns)
MAX9171 toc08
2.5
DIFFERENTIAL PROPAGATION DELAY (ns)
2.0
1.9
2.0
t
PHLD
t
PLHD
1.5
1.8
t
PHLD
1.7
t
PLHD
1.6
1.0
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
1.5
-40
-15
10
35
60
85
TEMPERATURE (°C)
4
_______________________________________________________________________________________
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