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PCX107AVZFU100LD

Description
Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size45KB,2 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric Compare View All

PCX107AVZFU100LD Overview

Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503

PCX107AVZFU100LD Parametric

Parameter NameAttribute value
MakerAtmel (Microchip)
Parts packaging codeBGA
package instructionBGA,
Contacts503
Reach Compliance Codeunknown
Other featuresALSO REQUIRES 3.3V SUPPLY
Address bus width32
boundary scanYES
Bus compatibilityPOWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X
maximum clock frequency66 MHz
External data bus width64
JESD-30 codeS-PBGA-B503
length33 mm
Number of I/O lines
Number of terminals503
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Package shapeSQUARE
Package formGRID ARRAY
Certification statusNot Qualified
Maximum seat height2.75 mm
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
width33 mm
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The PC107 PCI Bridge/Integrated Memory Controller provides a bridge between the Peripheral Component
Interconnect (PCI) bus and PC6xx, PC7xx, and PC74xx microprocessors. PCI support allows system designers
to design systems quickly using peripherals already designed for PCI and the other standard interfaces available
in the personal computer hardware environment. The PC107 provides many of the other necessities for
embedded applications, including a high-performance memory controller and dual-processor support; two-
channel flexible DMA controller; an interrupt controller; an I
2
O-ready message unit; an inter-integrated circuit
controller (I
2
C); and low-skew clock drivers. The PC107 contains an Embedded Programmable Interrupt
Controller (EPIC) featuring five hardware interrupts (IRQs) as well as 16 serial interrupts along with four timers.
The PC107 uses an advanced, 2.5V HiP3 process technology and is fully compatible with TTL devices.
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- Four levels of power reduction–doze, nap, sleep, and suspend
- Fully static, internal logic states preserved during all power modes
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The memory interface controls processor and PCI interactions to main memory.
It supports a variety of programmable timing supporting DRAM (FPM, EDO), SDRAM,
and ROM/Flash ROM configurations, up to speeds of 100 MHz.
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The PC107 PCI interface is designed to connect the processor and memory buses to the
PCI local bus without the need for “glue” logic at speeds up to 66 MHz.
The PC107 acts as either a master or slave device on the PCI bus and contains a PCI
bus arbitration unit which reduces the need for an equivalent external unit, thus reducing
the total system complexity and cost.
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The PC107 supports a programmable interface to microprocessors implementing the
PowerPC architecture operating at bus frequencies up to 100 MHz. The PC107
processor interface allows for a variety of system configurations by providing support for
a second processor and a local bus slave.
60x Bus
Data Path
ECC/Pariy
Unit
Memory
Data
I
2
O
Processor
Interface Unit
DMA
Central
Control Unit
Memory
Controller
Memory
Add/Cntl
Mem Clocks
I
2
C
I
2
C
PCI
Interface Unit
IRQs
PLL
EPIC
ATU
Timers
Arbiter
FO
Buffer
PCI Clocks
DLL
Clock In
PCI Bus
REQ/GNT
OSC
PC107 - Rev.5 – 01/04

PCX107AVZFU100LD Related Products

PCX107AVZFU100LD PCX107AMZFU100LC PCX107AVZFU100LC PCX107AMZFU100LD PCX107AMGH100LD PCX107AVGH100LD
Description Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503 Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503 Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503 Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, 2.75 MM HEIGHT, 1.27 MM PITCH, FLIP CHIP, PLASTIC, BGA-503 Multifunction Peripheral, CMOS, CBGA503, 33 X 33 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, HITCE, CERAMIC, BGA-503 Multifunction Peripheral, CMOS, CBGA503, 33 X 33 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, HITCE, CERAMIC, BGA-503
Maker Atmel (Microchip) Atmel (Microchip) Atmel (Microchip) Atmel (Microchip) Atmel (Microchip) Atmel (Microchip)
Parts packaging code BGA BGA BGA BGA BGA BGA
package instruction BGA, BGA, BGA, BGA, BGA, BGA,
Contacts 503 503 503 503 503 503
Reach Compliance Code unknown unknown unknown unknown unknown unknow
Other features ALSO REQUIRES 3.3V SUPPLY ALSO REQUIRES 3.3V SUPPLY ALSO REQUIRES 3.3V SUPPLY ALSO REQUIRES 3.3V SUPPLY ALSO REQUIRES 3.3V SUPPLY ALSO REQUIRES 3.3V SUPPLY
Address bus width 32 32 32 32 32 32
boundary scan YES YES YES YES YES YES
Bus compatibility POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X POWERPC 603E; POWERPC 740; POWERPC 750; PC7400; 60X
maximum clock frequency 66 MHz 66 MHz 66 MHz 66 MHz 66 MHz 66 MHz
External data bus width 64 64 64 64 64 64
JESD-30 code S-PBGA-B503 S-PBGA-B503 S-PBGA-B503 S-PBGA-B503 S-CBGA-B503 S-CBGA-B503
length 33 mm 33 mm 33 mm 33 mm 33 mm 33 mm
Number of terminals 503 503 503 503 503 503
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code BGA BGA BGA BGA BGA BGA
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.75 mm 2.75 mm 2.75 mm 2.75 mm 3.2 mm 3.2 mm
Maximum supply voltage 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V
Minimum supply voltage 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V
Nominal supply voltage 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Terminal form BALL BALL BALL BALL BALL BALL
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
width 33 mm 33 mm 33 mm 33 mm 33 mm 33 mm

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