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TSXPC860MHMZPU50C

Description
Micro Peripheral IC, CBGA357
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size885KB,96 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric Compare View All

TSXPC860MHMZPU50C Overview

Micro Peripheral IC, CBGA357

TSXPC860MHMZPU50C Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicrochip
Reach Compliance Codeunknown
JESD-30 codeS-XBGA-B357
JESD-609 codee0
Number of terminals357
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC
encapsulated codeBGA
Encapsulate equivalent codeBGA357,19X19,50
Package shapeSQUARE
Package formGRID ARRAY
power supply3.3 V
Certification statusNot Qualified
Nominal supply voltage3.3 V
surface mountYES
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
Features
H
PowerPC single issue integer core.
H
Precise exception model.
H
Extensive system development support
- on-chip watchpoints and breakpoints,
- program flow tracking,
- On-chip emulation (OnCE) development interface.
H
High performance (Dhrystone 2.1: 52 MIPS @ 50 MHz, 3.3V, 1.3 Watts total power).
H
Low power (< 241 mW @25 MHz, 2.4 V internal, 3.3 V I/O-core, caches, MMUs, I/O).
H
MPC8XX PowerPC system interface, including a periodic interrupt timer, a bus monitor, and
real-time clocks.
H
Single Issue, 32-Bit Version of the Embedded PowerPC Core (fully Compatible with Book 1 of
the PowerPC Architecture Definition) with 32 X 32 – Bit Fixed Point Registers
– Embedded PowerPC Performs Branch Folding, Branch Prediction with Conditional Prefetch,
without Conditional Execution
– 4 Kbyte Data Cache and 4 Kbyte Instruction Cache, Each with an MMU
– Instruction and Data Caches are two way, Set Associative, Physical Address, 4 Word Line
Burst, Least Recently Used (LRU) Replacement, Lockable On-Line Granularity
– MMUs with 32 Entry TLB, Fully associative Instruction and Data TLBs
– MMUs Support Multiple Page Sizes of 4kB, 16 kB, 256 KB, 512 KB and 8 MB ; 16 Virtual
Address Spaces and 8 Protection Groups
– Advanced On-Chip-Emulation Debug Mode
H
Up to 32-bit Data Bus
(Dynamic Bus Sizing for 8 and 16 bits).
H
32 Address Lines
H
Fully Static Design.
H
V
CC
= +3.3 V± 5 % .
H
f
max
= 66 MHz (80 MHZ tbc)
TSPC860
32 BIT QUAD INTEGRATED
POWER QUICC
TM
COMMUNICATION
CONTROLLER
PRELIMINARY
SPECIFICATION
beta SITE
H
Military temperature range : –55°C < T
C
< +125°C.
H
P
D
= 0.75 W typical @ 66 MHz
H
ATM SAR support available on TSPC860SR version
Description
The TSPC860 PowerPCt QUad Integrated Communication Controller (Power
QUICCt)
is a
versatile one-chip integrated microprocessor and peripheral combination that can be used in a
variety of controller applications. It particularly excels in communications and networking sys-
tems. The Power QUICC (pronounced ”quick”) can be described as a PowerPC-based derivative
of TS68EN360 (QUICCt).
The CPU on the TSPC860 is a 32-bit PowerPC implementation that incorporates memory man-
agement units (MMUs) and instruction and data caches. The communications processor module
(CPM) of the TS68EN360 QUICC has been enhanced with the addition of the interprocessor-inte-
grated controller (I
2
C) channel. Moderate to high digital signal processing (DSP) functionality has
been added to the CPM. The memory controller has been enhanced, enabling the TSPC860 to
support any type of memory, including high performance memories and newer dynamic random
access memories (DRAMs). Overall system functionality is completed with the addition of a
PCMCIA socket controller supporting up to two sockets and a real-time clock.
PBGA 357
ZP suffix
Screening / Quality
This product will be manufactured in full compliance with :
H
Or according to ATMEL-Grenoble standard.
August 2000
1/96

TSXPC860MHMZPU50C Related Products

TSXPC860MHMZPU50C TSXPC860MHMZP50C TSXPC860MHMZP50B TSXPC860MHVZPU/T50B TSXPC860MHMZPU/T40B TSXPC860MHMZP40C TSXPC860MHMZPU/T40C
Description Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357 Micro Peripheral IC, CBGA357
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknow
JESD-30 code S-XBGA-B357 S-XBGA-B357 S-XBGA-B357 S-XBGA-B357 S-XBGA-B357 S-XBGA-B357 S-XBGA-B357
JESD-609 code e0 e0 e0 e0 e0 e0 e0
Number of terminals 357 357 357 357 357 357 357
Maximum operating temperature 125 °C 125 °C 125 °C 110 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -40 °C -55 °C -55 °C -55 °C
Package body material CERAMIC CERAMIC CERAMIC CERAMIC CERAMIC CERAMIC CERAMIC
encapsulated code BGA BGA BGA BGA BGA BGA BGA
Encapsulate equivalent code BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES
Temperature level MILITARY MILITARY MILITARY INDUSTRIAL MILITARY MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form BALL BALL BALL BALL BALL BALL BALL
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
Maker Microchip - - Microchip Microchip Microchip Microchip
Certification status Not Qualified Not Qualified Not Qualified - - Not Qualified -
Base Number Matches - 1 1 1 1 - -
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