SN74AUC74RGYR datasheet, PDF - EEWORLD Datasheet

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SN74AUC74RGYR: DescriptionDual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset 14-VQFN -40 to 85; Categorylogic logic; File Size799KB，12 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74AUC74RGYR Overview

Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset 14-VQFN -40 to 85

SN74AUC74RGYR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	QFN
package instruction	HVQCCN, LCC14/18,.14SQ,20
Contacts	14
Reach Compliance Code	compli
ECCN code	EAR99
Factory Lead Time	1 week
series	AUC
JESD-30 code	S-PQCC-N14
JESD-609 code	e4
length	3.5 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Su	225000000 Hz
MaximumI(ol)	0.009 A
Humidity sensitivity level	2
Number of digits	1
Number of functions	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC14/18,.14SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/2.5 V
Maximum supply current (ICC)	0.01 mA
Prop。Delay @ Nom-Su	4 ns
propagation delay (tpd)	4 ns
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	3.5 mm
minfmax	350 MHz

SN74AUC74RGYR Related Products

	SN74AUC74RGYR	SN74AUC74RGYRG4
Description	Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset 14-VQFN -40 to 85	Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset 14-VQFN -40 to 85
Brand Name	Texas Instruments	Texas Instruments
Is it Rohs certified?	conform to	conform to
Maker	Texas Instruments	Texas Instruments
Parts packaging code	QFN	QFN
package instruction	HVQCCN, LCC14/18,.14SQ,20	HVQCCN, LCC14/18,.14SQ,20
Contacts	14	14
Reach Compliance Code	compli	compli
series	AUC	AUC
JESD-30 code	S-PQCC-N14	S-PQCC-N14
JESD-609 code	e4	e4
length	3.5 mm	3.5 mm
Load capacitance (CL)	15 pF	15 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Su	225000000 Hz	225000000 Hz
MaximumI(ol)	0.009 A	0.005 A
Humidity sensitivity level	2	2
Number of digits	1	1
Number of functions	2	2
Number of terminals	14	14
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HVQCCN	HVQCCN
Encapsulate equivalent code	LCC14/18,.14SQ,20	LCC14/18,.14SQ,20
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing	TR	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260
power supply	1.2/2.5 V	1.2/2.5 V
Prop。Delay @ Nom-Su	4 ns	4 ns
propagation delay (tpd)	4 ns	4 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm
Maximum supply voltage (Vsup)	2.7 V	2.7 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE
width	3.5 mm	3.5 mm
minfmax	350 MHz	350 MHz

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