MP2492
2A, 55V, 100kHz Step-Down Converter
with Programmable Output Current Limit
The Future of Analog IC Technology
DESCRIPTION
The MP2492 is a monolithic step-down switch
mode converter with a programmable output
current limit. It achieves 2A continuous output
current over a wide input supply range with
excellent load and line regulation.
The maximum output current can be
programmed by sensing current through the
inductor DC resistance (DCR) or an accurate
sense resistor.
MP2492 achieves low EMI signature with well
controlled switching edges.
Fault condition protection includes cycle-by-cycle
current limiting, and thermal shutdown.
The MP2492 requires a minimum number of
readily available standard external components.
The MP2492 is available in QFN10 (3mm x 3mm)
and SOIC8E packages.
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FEATURES
Wide 4.5V to 55V Operating Input Range
Programmable up to 2A Output Current
Output Adjustable from 0.8V to 15V
Programmable Output Current Limit without
power loss
0.25Ω Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic
Capacitors
Fixed 100kHz Frequency
Low EMI signature
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Available in QFN10 and SOIC8E Packages
USB Power Supplies
Automotive Cigarette Lighter Adapters
Power Supply for Linear Chargers
APPLICATIONS
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency
100
90
EFFICIENCY ( % )
V
IN
=12V , V
OUT
=5V
80
70
60
50
40
30
20
0.0
0.4
0.8
1.2
1.6
2.0
I
OUT
(A)
MP2492 Rev. 1.0
12/20/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
1
MP2492 – 2A, 55V, 100kHz WITH PROGRAMMABLE OUTPUT CURRENT LIMIT
ORDERING INFORMATION
Part Number
MP2492DN*
MP2492DQ**
Package
SOIC8E
QFN10(3mmx3mm)
Top Marking
MP2492DN
3Q
Free Air Temperature (T
A
)
–40°C to +85°C
–40°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP2492DN–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP2492DN–LF–Z)
**
For Tape & Reel, add suffix –Z (e.g. MP2492DQ–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP2492DQ–LF–Z)
PACKAGE REFERENCE
VIN
GND
FB
SS
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
SW
BST
ISP
ISN
VIN
GND
EN
FB
SS
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
SW
BST
PGOOD
ISP
ISN
SOIC8E
QFN10(3mmx3mm)
ABSOLUTE MAXIMUM RATINGS
(1)
Input Voltage V
IN
.......................................... 60V
V
SW
....................................... –0.3V to V
IN
+ 0.3V
V
BST
................................................... V
SW
+ 6.5V
V
ISN,
v
ISP
................................................ 0V to15V
| V
ISN,
- v
ISP
| ........................................ 0 to 0.5V
V
EN,
....................................................... 0V to15V
All Other Pins .............................. –0.3V to +6.5V
(2)
Continuous Power Dissipation (T
A
= +25°C)
SOIC8E ...................................................... 2.5W
QFN10 (3 x 3 mm) ..................................... 2.5W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature .............. –50°C to +150°C
Recommended Operating Conditions
(3)
Input Voltage V
IN
.............................. 4.5V to 55V
Output Voltage V
OUT
(V
IN
>16.5V) ...... 0.8V to 15V
Output Voltage V
OUT
(V
IN
<=16.5V) .....................
........................................0.8V to (V
IN
–1.7) V
Operating Junct. Temp. .......... –40°C to +125°C
Thermal Resistance
(4)
SOIC8E................................... 50...... 10 ..
°C/W
QFN10 (3 x 3 mm)...................50........12...
°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX), the junction-to-
ambient thermal resistance
θ
JA
, and the ambient temperature
T
A
. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P
D
(MAX) = (T
J
(MAX)-T
A
)/θ
JA
. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
θ
JA
θ
JC
MP2492 Rev. 1.0
12/20/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
2
MP2492 – 2A, 55V, 100kHz WITH PROGRAMMABLE OUTPUT CURRENT LIMIT
ELECTRICAL CHARACTERISTICS
V
IN
= 12V, T
A
= +25°C, unless otherwise noted.
Parameters
Feedback Voltage
Feedback Bias Current
Switch On Resistance
Switch Leakage
(5)
Current Limit
Oscillator Frequency
Boot-Strap Voltage
Minimum On Time
SW rising edge
SW falling edge
Under Voltage Lockout Threshold
Rising
Under Voltage Lockout Threshold
Hysteresis
Supply Current (Quiescent)
Thermal Shutdown
Current Sense Voltage
Input Bias Current (ISN, ISP)
EN Input Low Voltage
(5)
En Input High Voltage
(5)
EN Input Bias Current
(5)
PGOOD Sink Voltage
Dropout
Note:
4) Guaranteed by design
5) Only available for the MP2490DQ
Symbol
V
FB
I
BIAS(FB)
R
DS(ON)
Condition
4.5V
≤
V
IN
≤
55V
V
FB
= 0.8V
V
EN
= 0V, V
SW
= 0V
Min
0.78
Typ
0.8
10
0.25
0.1
3.5
Max
0.82
Units
V
nA
Ω
10
120
µA
A
kHz
V
ns
ns
ns
f
SW
V
BST
- V
SW
t
ON
trise
tfall
V
FB
= 0.6V
V
FB
= 1V
Vin=12V, Vo=5V, Io=2A
Vin=12V, Vo=5V, Io=2A
80
100
4.3
100
50
50
3.0
3.3
200
3.6
V
mV
V
EN
=
2V, V
FB
= 1V
V
ISP
–V
ISN
V
ISP
, V
ISN
0.4–15V
0.4–15V
90
–1
1.8
V
EN
=
0-6V
Sink Current 5mA
-10
500
150
100
–0.5
800
110
+1
0.4
µA
°C
mV
µA
V
V
µA
V
I
BIAS (ISN,ISP)
V
ISP
, V
ISN
-2
10
0.3
MP2492 Rev. 1.0
12/20/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
3
MP2492 – 2A, 55V, 100kHz WITH PROGRAMMABLE OUTPUT CURRENT LIMIT
PIN FUNCTIONS
QFN10
Pin #
1
SOIC-8
Pin #
1
Name
Description
Supply Voltage. The MP2492 operates from a +4.5V to +55V unregulated input.
C
IN
is needed to prevent large voltage spikes from appearing at the input. Put C
IN
VIN
as close to the IC as possible. It is the drain of the internal power device and
power supply for the whole chip.
GND Ground. This pin is the voltage reference for the regulated output voltage. For this
Exposed reason care must be taken in its layout. This node should be placed outside of the
Pad
D1 to C
IN
ground path to prevent switching current spikes from inducing voltage
noise into the part, Exposed Pad must be connected to Ground pin.
EN
On/Off Control Input.
An external resistor divider from the output to GND, tapped to the FB pin sets the
FB
output voltage.
Connect to an external capacitor used for Soft-Start and compensation for current
SS
limiting loop.
ISN
Negative Current Sense Input for load current limiting.
ISP
Positive Current Sense
Power good signal. When FB is less than 90% of 0.8V, PGOOD is low. It is an
PGOOD open-drain output. Use a high value pull-up resistor externally to pull it up to
system power supply.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the
supply voltage. It is connected between SW and BST pins to form a floating
supply across the power switch driver. An on-chip regulator is used to charge up
BST
the external boot-strap capacitor. If the on-chip regulator is not strong enough, one
optional diode can be connected from IN or OUT to charge the external boot-strap
capacitor.
SW
Switch Output. It is the source of power device.
2
3
4
5
6
7
8
2
3
4
5
6
9
7
10
8
MP2492 Rev. 1.0
12/20/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
4
MP2492 – 2A, 55V, 100kHz WITH PROGRAMMABLE OUTPUT CURRENT LIMIT
TYPICAL PERFORMANCE CHARACTERISTICS
C1=220uF, C2=2.2uF, C3=39uF, C4=22uF, L=39uH, T
A
=25ºC，unless otherwise noted.
Efficiency vs. Load Current
V
OUT
=5V
100
90
EFFICIENCY ( % )
Efficiency vs. Load Current
V
IN
=8V
EFFICIENCY ( % )
Efficiency vs. Load Current
V
OUT
=2.5V
V
OUT
=3.3V
V
IN
=8V
100
90
EFFICIENCY ( % )
100
90
80
70
60
50
40
30
20
0.4
0.8
1.2
1.6
2.0
0.0
0.4
0.8
1.2
1.6
2.0
I
OUT
(A)
I
OUT
(A)
V
IN
=50V
V
IN
=4.5V
V
IN
=12V
80
70
60
50
40
30
20
0.0
0.4
0.8
1.2
1.6
2.0
V
IN
=50V
V
IN
=12V
80
70
60
50
40
30
20
0.0
V
IN
=12V
V
IN
=50V
I
OUT
(A)
Load Regulation
5.004
5.000
4.996
V
OUT
(V)
Load Regulation
3.310
V
OUT
=3.3V
2.510
2.508
V
IN
=8V
3.302
3.298
3.294
3.290
0.0
0.4
0.8
1.2
I
OUT
(A)
1.6
2.0
V
IN
=50V
V
IN
=12V
V
OUT
(V)
Load Regulation
V
OUT
=2.5V
V
IN
=12V
V
OUT
=5V
V
IN
=8V
V
IN
=12V
3.306
V
OUT
(V)
2.506
2.504
2.502
2.500
0.0
V
IN
=50V
4.992
4.988
4.984
4.980
0.0
0.4
V
IN
=50V
0.8
1.2
I
OUT
(A)
1.6
2.0
0.4
0.8
1.2
1.6
2.0
I
OUT
(A)
6.0
5.2
I
L
CURRENT (A)
Maximum I
OUT
vs.
Duty Cycle
Loop Gain with Phase Margin
50
40
30
20
10
0
-10
-20
-30
-40
-50
Gain
Phase
V
IN
=12V, V
OUT
=5V, I
OUT
=1.8A
200
160
120
80
0
-40
V
OUT
(V)
Current regulation
Sense to DCR
6
5
4
3
2
1
0
0
0.5
1
1.5
2
2.5
LOAD CURRENT ( A )
4.4
3.6
2.8
2.0
0
20
40
60
80
100
DUTY CYCLE ( % )
40
-80
-120
-160
0.1
1
10
100
-200
1000
FRE QUE NCY (kHz)
MP2492 Rev. 1.0
12/20/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
5
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