EE PLD, 5.5ns, 128-Cell, CMOS, PQFP100,
Parameter Name | Attribute value |
Is it Rohs certified? | incompatible |
Maker | Vantis Corporation |
Reach Compliance Code | unknown |
Other features | 128 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK; PROGRAMMABLE POLARITY |
maximum clock frequency | 105 MHz |
In-system programmable | YES |
JESD-30 code | R-PQFP-G100 |
JESD-609 code | e0 |
JTAG BST | YES |
Dedicated input times | 2 |
Number of I/O lines | 64 |
Number of macro cells | 128 |
Number of terminals | 100 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 2 DEDICATED INPUTS, 64 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | QFP |
Encapsulate equivalent code | QFP100,.63SQ,20 |
Package shape | RECTANGULAR |
Package form | FLATPACK |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
power supply | 5 V |
Programmable logic type | EE PLD |
propagation delay | 5.5 ns |
Certification status | Not Qualified |
Maximum supply voltage | 5.25 V |
Minimum supply voltage | 4.75 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal surface | Tin/Lead (Sn/Pb) |
Terminal form | GULL WING |
Terminal pitch | 0.5 mm |
Terminal location | QUAD |
Maximum time at peak reflow temperature | NOT SPECIFIED |