PD - 97471A
AUTOMOTIVE GRADE
Features
Low On-Resistance
Dynamic dV/dT Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
AUIRF4104
AUIRF4104S
HEXFET
®
Power MOSFET
D
V
(BR)DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
40V
4.3mΩ
5.5mΩ
120A
75A
G
S
Description
I
D (Package Limited)
k
Specifically designed for Automotive applications, this
HEXFET
®
Power MOSFET utilizes the latest process-
ing techniques to achieve extremely low on-resistance
per silicon area. Additional features of this design are
a 175°C junction operating temperature, fast switching
speed and improved repetitive avalanche rating . These
features combine to make this design an extremely
efficient and reliable device for use in Automotive
applications and a wide variety of other applications.
TO-220AB
AUIRF4104
D
2
Pak
AUIRF4104S
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only;
and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings
are measured under board mounted and still air conditions. Ambient temperature (T
A
) is 25°C, unless otherwise specified.
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
E
AS
(tested )
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
Power Dissipation
Max.
120
84
75
470
140
k
k
Units
A
W
W/°C
V
mJ
A
mJ
°C
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Ã
g
d
0.95
± 20
120
220
See Fig.12a, 12b, 15, 16
-55 to + 175
300 (1.6mm from case )
10 lbf in (1.1N m)
Operating Junction and
Storage Temperature Range
g
Thermal Resistance
R
θJC
R
θCS
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
j
y
y
Junction-to-Case
i
Parameter
Typ.
–––
0.50
–––
Max.
1.05
–––
40
Units
°C/W
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient (PCB Mount)
R
θJA
®
is a registered trademark of International Rectifier.
HEXFET
*Qualification
standards can be found at http://www.irf.com/
Note
to
are on page 3
www.irf.com
1
3/29/10
AUIRF4104/S
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise stated)
Parameter
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
R
DS(on)
V
GS(th)
gfs
I
DSS
I
GSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
40
–––
–––
2.0
63
–––
–––
–––
–––
–––
0.032
4.3
–––
–––
–––
–––
–––
–––
–––
–––
5.5
4.0
–––
20
250
200
-200
V
Conditions
V
GS
= 0V, I
D
= 250μA
V/°C Reference to 25°C, I
D
= 1mA
mΩ V
GS
= 10V, I
D
= 75A
V
V
μA
nA
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 10V, I
D
= 75A
e
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise stated)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
68
21
27
16
130
38
77
4.5
7.5
3000
660
380
2160
560
850
100
–––
–––
–––
–––
–––
–––
–––
nH
–––
–––
–––
–––
–––
–––
–––
pF
ns
nC
I
D
= 75A
V
DS
= 32V
V
GS
= 10V
V
DD
= 20V
I
D
= 75A
R
G
= 6.8
Ω
V
GS
= 10V
e
e
Between lead,
6mm (0.25in.)
from package
and center of die contact
V
GS
= 0V
V
DS
= 25V
G
D
S
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 32V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 32V
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
f
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
23
6.8
75
A
470
1.3
35
10
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
T
J
= 25°C, I
F
= 75A, V
DD
= 20V
di/dt = 100A/μs
Ã
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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AUIRF4104/S
Qualification Information
†
Automotive
(per AEC-Q101)
Qualification Level
††
Comments:
This part number(s) passed Automotive
qualification. IR’s Industrial and Consumer qualification level is
granted by extension of the higher Automotive level.
TO-220AB
D PAK
2
Moisture Sensitivity Level
Machine Model
Human Body Model
Charged Device
Model
RoHS Compliant
N/A
MSL1
Class M4
AEC-Q101-002
Class H1C
AEC-Q101-001
Class C3
AEC-Q101-005
Yes
ESD
Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions to AEC-Q101 requirements are noted in the qualification report.
Notes:
This value determined from sample failure population,
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
starting T
J
= 25°C, L = 0.04mH, R
G
= 25Ω, I
AS
= 75A, V
GS
=10V
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.04mH
This is applied to D
2
Pak, when mounted on 1" square PCB
R
G
= 25Ω, I
AS
= 75A, V
GS
=10V. Part not
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
recommended for use above this value.
R
θ
is measured at T
J
approximately 90°C.
Pulse width
≤
1.0ms; duty cycle
≤
2%.
This is only applied to TO-220AB pakcage.
C
oss
eff. is a fixed capacitance that gives the
Calculated continuous current based on maximum allowable
same charging time as C
oss
while V
DS
is rising
junction temperature. Bond wire current limit is 75A. Note that
from 0 to 80% V
DSS
.
current limitations arising from heating of the device leads may
occur with some lead mounting arrangements.(Refer
to AN-1140
http://www.irf.com/technical-info/appnotes/an-1140.pdf)
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3
AUIRF4104/S
1000
TOP
V
GS
1000
TOP
ID, Drain-to-Source Current (A)
100
10
ID, Drain-to-Source Current (A)
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
V
GS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
4.5V
1
0.1
0.1
1
20μs PULSE WIDTH
Tj = 25°C
10
10
100
4.5V
0.1
1
20μs PULSE WIDTH
Tj = 175°C
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
120
T J = 25°C
T J = 175°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current
(
A)
100
80
60
40
20
0
T J = 25°C
100
TJ = 175°C
10
1
4
6
8
VDS = 15V
20μs PULSE WIDTH
10
12
VDS = 10V
380μs PULSE WIDTH
0
20
40
60
80
100
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Typical Forward Transconductance
Vs. Drain Current
4
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AUIRF4104/S
5000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
20
ID= 75A
VDS= 32V
VDS= 20V
4000
VGS, Gate-to-Source Voltage (V)
16
C, Capacitance (pF)
3000
Ciss
12
2000
8
1000
Coss
Crss
4
0
1
10
100
0
0
20
40
60
80
100
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000.0
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100.0
T J = 175°C
10.0
T J = 25°C
1.0
1000
100
100μsec
10
Tc = 25°C
Tj = 175°C
Single Pulse
0
1
10
1msec
10msec
100
1000
0.1
0.2
0.6
1.0
VGS = 0V
1.4
1.8
1
VSD, Source-toDrain Voltage (V)
VDS , Drain-toSource Voltage (V)
ance
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
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5
Embedded System
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