ST2L05
VERY LOW QUIESCENT CURRENT
DUAL VOLTAGE REGULATOR
s
s
s
s
s
s
s
s
s
s
s
s
V
O1
= 1.5, 1.8, 2.5, 2.8, 3.0, 3.3V FIXED
V
O2
= 1.5, 1.8, 2.5, 2.8, 3.0, 3.3V FIXED OR
ADJUSTABLE FROM 1.25 TO V
I
- V
DROP
GUARANTEED OUTPUT1 CURRENT: 1A
GUARANTEED OUTPUT2 CURRENT: 1A
± 2% OUTPUT TOLERANCE (AT 25°C)
± 3% OUTPUT TOLERANCE OVER TEMP.
TYPICAL DROPOUT 1.1V (I
O1
= I
O2
= 1A)
INTERNAL POWER AND THERMAL LIMIT
STABLE WITH LOW ESR OUTPUT
CAPACITOR
OPERATING TEMPERATURE RANGE:
0°C TO 125°C
VERY LOW QUIESCENT CURRENT: 7mA
MAX OVER TEMP.
AVAILABLE IN PPAK, SPAK AND IN DFN
5x6mm PACKAGE
SPAK-5L
PPAK
DFN
DESCRIPTION
Specifically
designed
for
data
storage
applications, this device integrates two voltage
regulators, each one able to supply 1A and it is
assembled in PPAK, in SPAK and in a new 8-PIN
surface mounting package named DFN 5x6mm at
8 pins. The first regulator block supplies 1.5V,
1.8V, 2.5V, 2.8V, 3.0V, 3.3V depending on the
BLOCK DIAGRAM OF FIXED/ADJ VERSION
chosen version. The second one may be fixed to
the same values or adjustable from 1.25V to V
I
-
V
DROP
that could power several kind of different
micro-controllers. Both outputs are current limited
and over temperature protected. It is worth
underlining the very good thermal performance of
the packages SPAK and DFN with only 2°C/W of
Thermal
Resistance
Junction
to
Case.
Applications are HARD DISK, CD/DVD-ROM, CD/
DVD-R/RW, COMBO (DVD-ROM+CD-R/RW).
October 2003
1/24
ST2L05
ABSOLUTE MAXIMUM RATINGS
Symbol
V
I
P
D
I
OSH
T
op
T
stg
T
LEAD
Operating Input Voltage
Power Dissipation
Short Circuit Output Current - 3.3 V and adjustable output
Operating Junction Temperature Range
Storage Temperature Range
(*)
Lead Temperature (Soldering) 10 Sec.
Parameter
Value
10
Internally Limited
Internally Limited
0 to 150
-65 to 150
260
°C
°C
°C
Unit
V
(*) Storage temperatures > 125°C are only acceptable if the Dual Regulator is soldered to a PCBA.
Absolute Maximum Ratings are those beyond which damage to the device may occur. Functional operation under these condition is not im-
plied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
I
∆V
I
t
RISE
t
FALL
Input Voltage
Input Voltage Ripple
Input Voltage Rise Time (from 10% to 90%)
Input Voltage Fall Time (from 10% to 90%)
Parameter
Value
4.5 to 7
± 0.15
≥
1
≥
1
Unit
V
V
µsec
µsec
THERMAL DATA
Symbol
R
thj-case
R
thj-amb
Parameter
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
SPAK
2
26
DFN
2
36
PPAK
8
100
Unit
°C/W
°C/W
CONNECTION DIAGRAM
(top view for PPAK and SPAK, top through view for DFN8)
PPAK
SPAK
DFN8
PIN DESCRIPTION
PPAK/SPAK
1
2
3
4
5
DFN
3
4
8
5
7
1, 2, 6
Symbol
V
I
ADJ/N.C.
GND
V
O2
V
O1
NC
Name and Function
Bypass with a 4.7µF capacitor to GND
Resistor divider connection/Not Connected
Ground
Adjustable output voltage: bypass with a 4.7µF capacitor to GND
Fixed output voltage: bypass with a 4.7µF capacitor to GND
Not Connected
4/24
ST2L05
APPLICATION CIRCUIT OF FIXED/FIXED VERSION
APPLICATION CIRCUIT OF FIXED/ADJ VERSION
NOTE: The regulator is designed to be stable with either tantalum or ceramic capacitors on the input and outputs. The expected values of
the input and output X7R ceramic capacitors are from 4.7µF to 22µF with 4.7µF typical. The input capacitor must be connected within 0.5
inches of the V
I
terminal. The output capacitors must also be connected within 0.5 inches of output pins V
O1
and V
O2
. There is no upper limit
to the size of the input capacitor (for more details see the Application Hints section).
NOTE: In the Fixed/ADJ version, the adjustable output voltage V
O2
is designed to support output voltages from 1.25V to V
I
- V
DROP
. The
adjustable output voltage V
O2
is set by a resistor divider connected between V
O2
(pin4) and Ground (pin3) with its centre tap connected to
V
O2
ADJ (pin2). The voltage divider resistors are: R
1
connected to V
O2
and V
O2
ADJ and R
2
connected to V
O2
ADJ and GND. V
O2
is deter-
mined by V
REF
, R
1
, R
2
, and I
ADJ
as follows (for more details see the Application Hints section):
V
O2
= V
REF
(1+R
1
/R
2
) + I
ADJ
R
1
5/24
MCU
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