MC9S08JM16 Series Features
8-Bit HCS08 Central Processor Unit (CPU)
48 MHz HCS08 CPU (central processor unit)
24 MHz internal bus frequency
HC08 instruction set with added BGND instruction
Background debugging system
Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two more
breakpoints in on-chip debug module)
• In-circuit emulator (ICE) debug module containing
two comparators and nine trigger modes. Eight
deep FIFO for storing change-of-flow addresses
and event-only data. Debug module supports both
tag and force breakpoints
• Support for up to 32 interrupt/reset sources
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Peripherals
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USB —
USB 2.0 full-speed (12 Mbps) with
dedicated on-chip 3.3 V regulator and transceiver;
supporting endpoint 0 and up to 6 additional
endpoints
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ADC
— 8-channel, 12-bit analog-to-digital
converter with automatic compare function;
internal temperature sensor
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ACMP
— Analog comparator with option to
compare to internal reference; operation in stop3
mode
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SCI
— Up to two serial communications interface
modules with optional 13-bit break; LIN
extensions
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SPI
— Two 8- or 16-bit selectable serial peripheral
interface modules with a receive data buffer
hardware match function
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IIC
— Inter-integrated circuit bus module to
operate at up to 100 kbps with maximum bus
loading; multi-master operation; programmable
slave address; interrupt-driven byte-by-byte data
transfer; broadcast mode; 10-bit addressing
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Timers
— One 2-channel and one 4-channel
16-bit timer/pulse-width modulator (TPM)
modules; selectable input capture, output
compare, and edge-aligned PWM capability on
each channel. Each timer module may be
configured for buffered, centered PWM (CPWM)
on all channels
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KBI
— 7-pin keyboard interrupt module
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RTC
— Real-time counter with binary- or
decimal-based prescaler
Memory Options
• Up to 16 KB of on-chip in-circuit programmable
flash memory with block protection and security
options
• Up to 1 KB of on-chip RAM
• 256 bytes of USB RAM
Clock Source Options
• Clock source options include crystal, resonator,
external clock
• MCG (multi-purpose clock generator) — PLL and
FLL; internal reference clock with trim adjustment
System Protection
• Optional computer operating properly (COP) reset
with option to run from independent 1 kHz internal
clock source or the bus clock
• Low-voltage detection with reset or interrupt
• Illegal opcode detection with reset
• Illegal address detection with reset
Input/Output
• Up to 37 general purpose input/output pins
• Software selectable pullup on ports when used as
inputs
• Software selectable slew rate control on ports
when used as outputs
• Software selectable drive strength on ports when
used as outputs
• Master reset pin and power-on reset (POR)
• Internal pullup on RESET, IRQ, and BKGD/MS
pins to reduce customer system cost
Power-Saving Modes
• Wait plus two stops
Package Options
• 48-pin quad flat no-lead (QFN)
• 44-pin low-profile quad flat package (LQFP)
• 32-pin low-profile quad flat package (LQFP)