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IS61WV12816BLL-12BLI

Description
Standard SRAM, 128KX16, 12ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MINI, BGA-48
Categorystorage    storage   
File Size116KB,15 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Environmental Compliance  
Download Datasheet Parametric View All

IS61WV12816BLL-12BLI Overview

Standard SRAM, 128KX16, 12ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MINI, BGA-48

IS61WV12816BLL-12BLI Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeBGA
package instructionTFBGA, BGA48,6X8,30
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time12 ns
I/O typeCOMMON
JESD-30 codeR-PBGA-B48
JESD-609 codee1
length8 mm
memory density2097152 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Encapsulate equivalent codeBGA48,6X8,30
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.0009 A
Minimum standby current2.5 V
Maximum slew rate0.04 mA
Maximum supply voltage (Vsup)3.63 V
Minimum supply voltage (Vsup)2.97 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Silver/Copper (Sn/Ag/Cu)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature40
width6 mm
IS61WV12816BLL
IS64WV12816BLL
128K x 16 HIGH-SPEED CMOS STATIC RAM
ISSI
FEBRUARY 2006
®
FEATURES
• High-speed access time:
12 ns: 3.3V + 10%
15 ns: 2.5V-3.6V
• Operating Current: 25mA (typ.)
• Stand by Current: 400µA(typ.)
• TTL and CMOS compatible interface levels
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperatures avail-
able
• Lead-free available
DESCRIPTION
The
ISSI
IS61WV12816BLL and IS64WV12816BLL are
high-speed, 2,097,152-bit static RAM organized as 131,072
words by 16 bits. They are fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE.
The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61WV12816BLL and IS64WV12816BLL are packaged
in the JEDEC standard 44-pin TSOP (Type II) and 48-pin
mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128Kx16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
02/03/06
1

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