74AVC8T245PW-T datasheet, PDF - EEWORLD Datasheet

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74AVC8T245PW-T: DescriptionIC,BUS TRANSCEIVER,SINGLE,8-BIT,AVC/ALVC/VCX-CMOS,TSSOP,24PIN,PLASTIC; Categorylogic logic; File Size124KB，23 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AVC8T245PW-T Overview

IC,BUS TRANSCEIVER,SINGLE,8-BIT,AVC/ALVC/VCX-CMOS,TSSOP,24PIN,PLASTIC

74AVC8T245PW-T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	NXP
package instruction	TSSOP, TSSOP24,.25
Reach Compliance Code	unknown
Control type	COMMON CONTROL
Counting direction	BIDIRECTIONAL
series	AVC
JESD-30 code	R-PDSO-G24
length	7.8 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	BUS TRANSCEIVER
MaximumI(ol)	0.008 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP24,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
power supply	1.5/3.3 V
Prop。Delay @ Nom-Sup	6.2 ns
propagation delay (tpd)	9.9 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
translate	1.5/3.3V&1.5/3.3V
width	4.4 mm
Base Number Matches	1

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74AVC8T245

8-bit dual supply translating transceiver with conﬁgurable

voltage translation; 3-state

Rev. 01 — 11 July 2008

Product data sheet

1. General description

The 74AVC8T245 is an 8-bit, dual supply transceiver that enables bidirectional level

translation. It features two data input-output ports (An and Bn), a direction control input

(DIR), a output enable input (OE) and dual supply pins (V

CC(A)

and V

CC(B)

). Both V

CC(A)

and V

CC(B)

can be supplied at any voltage between 0.8 V and 3.6 V making the device

suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V,

2.5 V and 3.3 V). Pins An, OE and DIR are referenced to V

CC(A)

and pins Bn are

referenced to V

CC(B)

. A HIGH on DIR allows transmission from An to Bn and a LOW on

DIR allows transmission from Bn to An. The output enable input (OE) can be used to

disable the outputs so the buses are effectively isolated.

The device is fully speciﬁed for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing any damaging backﬂow current through the

device when it is powered down. In suspend mode when either V

CC(A)

or V

CC(B)

are at

GND level, both An and Bn are in the high-impedance OFF-state.

2. Features

Wide supply voltage range:

CC(A)

: 0.8 V to 3.6 V

CC(B)

: 0.8 V to 3.6 V

Complies with JEDEC standards:

JESD8-12 (0.8 V to 1.3 V)

JESD8-11 (0.9 V to 1.65 V)

JESD8-7 (1.2 V to 1.95 V)

JESD8-5 (1.8 V to 2.7 V)

JESD8-B (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114E Class 3B exceeds 8000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101C exceeds 1000 V

Maximum data rates:

380 Mbit/s (≥ 1.8 V to 3.3 V translation)

260 Mbit/s (≥ 1.1 V to 3.3 V translation)

260 Mbit/s (≥ 1.1 V to 2.5 V translation)

210 Mbit/s (≥ 1.1 V to 1.8 V translation)

150 Mbit/s (≥ 1.1 V to 1.5 V translation)

100 Mbit/s (≥ 1.1 V to 1.2 V translation)

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