935299051125 datasheet, PDF - EEWORLD Datasheet

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935299051125: DescriptionLVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SC-74, SOT-457, TSOP-6; Categorylogic logic; File Size101KB，14 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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935299051125 Overview

LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SC-74, SOT-457, TSOP-6

935299051125 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Nexperia
package instruction	TSSOP,
Reach Compliance Code	compliant
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G6
JESD-609 code	e3
length	2.9 mm
Logic integrated circuit type	BUFFER
Humidity sensitivity level	1
Number of functions	2
Number of entries	1
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	10.8 ns
Filter level	AEC-Q100
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
width	1.5 mm
Base Number Matches	1

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74LVC2G34-Q100

Dual buffer gate

Rev. 1 — 1 August 2012

Product data sheet

1. General description

The 74LVC2G34-Q100 provides two buffers.

Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of

these devices in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits



Automotive product qualification in accordance with AEC-Q100 (Grade 1)



Specified from

40 C

to +85

C

and from

40 C

to +125

C



Wide supply voltage range from 1.65 V to 5.5 V



5 V tolerant inputs for interfacing with 5 V logic



High noise immunity



Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V)



ESD protection:



MIL-STD-883, method 3015 exceeds 2000 V



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0

)



24

mA output drive (V

= 3.0 V)



CMOS low power consumption



Latch-up performance exceeds 250 mA



Direct interface with TTL levels



Multiple package options

935299051125 Related Products

	935299051125	935299052125	74LVC2G34GV-Q100	74LVC2G34GW-Q100
Description	LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SC-74, SOT-457, TSOP-6	LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SOT-363, SC-88, 6 PIN	Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6	Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6
Is it Rohs certified?	conform to	conform to	conform to	conform to
package instruction	TSSOP,	TSSOP,	TSOP,	TSSOP,
Reach Compliance Code	compliant	compliant	compliant	compliant
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-G6	R-PDSO-G6	R-PDSO-G6	R-PDSO-G6
JESD-609 code	e3	e3	e3	e3
length	2.9 mm	2 mm	2.9 mm	2 mm
Logic integrated circuit type	BUFFER	BUFFER	BUFFER	BUFFER
Humidity sensitivity level	1	1	1	1
Number of functions	2	2	2	2
Number of entries	1	1	1	1
Number of terminals	6	6	6	6
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	TSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	10.8 ns	10.8 ns	10.8 ns	10.8 ns
Filter level	AEC-Q100	AEC-Q100	AEC-Q100	AEC-Q100
Maximum seat height	1.1 mm	1.1 mm	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	3.3 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	Tin (Sn)	Tin (Sn)	Tin (Sn)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.95 mm	0.65 mm	0.95 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	1.5 mm	1.25 mm	1.5 mm	1.25 mm
Maker	Nexperia	-	Nexperia	Nexperia
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	260	260
Maximum time at peak reflow temperature	-	NOT SPECIFIED	30	30

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