EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

M37542M4-XXXHP

Description
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size1MB,73 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric View All

M37542M4-XXXHP Overview

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37542M4-XXXHP Parametric

Parameter NameAttribute value
Parts packaging codeQFN
package instructionHVQCCN, LCC36,.25SQ,20
Contacts36
Reach Compliance Codecompli
Has ADCYES
Other featuresOPERATES AT 2.2 V MINIMUM SUPPLY AT 1 MHZ
Address bus width
bit size8
CPU seriesMELPS740
maximum clock frequency8 MHz
DAC channelNO
DMA channelNO
External data bus width
JESD-30 codeS-PQCC-N36
length6 mm
Number of I/O lines29
Number of terminals36
Maximum operating temperature85 °C
Minimum operating temperature-20 °C
PWM channelNO
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC36,.25SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
power supply2.5/5 V
Certification statusNot Qualified
RAM (bytes)512
rom(word)16384
ROM programmabilityMROM
Maximum seat height0.8 mm
speed8 MHz
Maximum slew rate9 mA
Maximum supply voltage5.5 V
Minimum supply voltage2.4 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
width6 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER
Base Number Matches1
CC3200 PWM and ADC issues
This is the first time I use TI's CC3200 WIFI module. I encountered a problem during use. Please help me. 1. CC3200SDK1.3.0 example/PWM routine, the default code works fine.After modifying the PWM fre...
zhangyuebin Wireless Connectivity
Libero SoC v11.8 pin optimization issue
I am a FPGA newbie. Recently, I was programming with Libero SoC v11.8. I defined an input pin in the top-level file. This pin was removed during synthesizing, which made it impossible to constrain thi...
凉凉呀凉凉 Altera SoC
FPGA Simplified Design Method Classic Case 3
FPGA Simplified Design Method Classic Case 3Classic case of minimalist design method 3Case 3. When receiving en1=1 , dout generates a high-level pulse of 3 clock cycles; when receiving en2==1 , dout g...
mdy-吴伟杰 FPGA/CPLD
MSP430G2553 interrupt processing function
[size=4]Interrupt handling function[/size] [size=4] [/size] [size=4]Process LED program in the interrupt handling function[/size] [size=4] [/size] [size=4]Compiler instructions[/size] [size=4]#pragma ...
Jacktang Microcontroller MCU
"Intel SoC FPGA Learning Experience" + Three mmap Examples in Eclipse under Linux
[i=s]This post was last edited by STM32F103 on 2019-6-2 22:23[/i] I referred to the mmap development driver application in Xiaomei's video tutorial. Since I use the DE10-Nano board, I made three corre...
STM32F103 FPGA/CPLD

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号