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XC3S1500-5FG320C

Description
FPGA, 3328 CLBS, 1500000 GATES, 725 MHz, PBGA320
CategoryProgrammable logic devices    Programmable logic   
File Size2MB,216 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
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XC3S1500-5FG320C Overview

FPGA, 3328 CLBS, 1500000 GATES, 725 MHz, PBGA320

XC3S1500-5FG320C Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerXILINX
Parts packaging codeBGA
package instruction19 X 19 MM, FBGA-320
Contacts320
Reach Compliance Code_compli
ECCN code3A991.D
Factory Lead Time12 weeks
maximum clock frequency725 MHz
Combined latency of CLB-Max0.53 ns
JESD-30 codeS-PBGA-B320
JESD-609 codee0
length19 mm
Humidity sensitivity level3
Configurable number of logic blocks3328
Equivalent number of gates1500000
Number of entries221
Number of logical units29952
Output times221
Number of terminals320
Maximum operating temperature85 °C
Minimum operating temperature
organize3328 CLBS, 1500000 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA320,18X18,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)225
power supply1.2,1.2/3.3,2.5 V
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height2 mm
Maximum supply voltage1.26 V
Minimum supply voltage1.14 V
Nominal supply voltage1.2 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn63Pb37)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width19 mm
0
R
Spartan-3 FPGA Family
Data Sheet
0
0
DS099 June 25, 2008
Product Specification
This document includes all four modules of the Spartan
®
-3 FPGA data sheet.
Module 1:
Spartan-3 FPGA Family: Introduction
and Ordering Information
DS099-1 (v2.4) June 25, 2008
Introduction
Features
Architectural Overview
Array Sizes and Resources
User I/O Chart
Ordering Information
Module 3:
Spartan-3 FPGA Family: DC and
Switching Characteristics
DS099-3 (v2.4) June 25, 2008
DC Electrical Characteristics
- Absolute Maximum Ratings
- Supply Voltage Specifications
- Recommended Operating Conditions
- DC Characteristics
Switching Characteristics
- I/O Timing
- Internal Logic Timing
- DCM Timing
- Configuration and JTAG Timing
Module 2:
Spartan-3 FPGA Family: Functional
Description
DS099-2 (v2.4) June 25, 2008
Input/Output Blocks (IOBs)
- IOB Overview
- SelectIO™ Interface I/O Standards
Configurable Logic Blocks (CLBs)
Block RAM
Dedicated Multipliers
Digital Clock Manager (DCM)
Clock Network
Configuration
Module 4:
Spartan-3 FPGA Family: Pinout
Descriptions
DS099-4 (v2.4) June 25, 2008
Pin Descriptions
- Pin Behavior During Configuration
Package Overview
Pinout Tables
- Footprints
IMPORTANT NOTE:
Each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy navigation
in this volume.
© 2003-2008 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS099 June 25, 2008
Product Specification
www.xilinx.com
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