GS70328SJ/TS
SOJ, TSOP
Commercial Temp
Industrial Temp
Features
• Fast access time: 7, 8, 10, 12, 15 ns
• 75/65/50/50/50 mA at max cycle rate
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
SJ: 300 mil, 28-pin SOJ package
TS: 8 mm x 13.4 mm, 28-pin TSOP Type I package
32K x 8
256Kb Asynchronous SRAM
7, 8, 10, 12, 15 ns
3.3 V V
DD
Corner V
DD
and V
SS
Pin Descriptions
Symbol
A
0
–A
14
DQ
1
–DQ
8
CE
WE
OE
V
DD
V
SS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
Description
The GS70328 is a high speed CMOS static RAM organized as
32,763 words by 8 bits. Static design eliminates the need for
external clocks or timing strobes. The GS70328 operates on a
single 3.3 V power supply, and all inputs and outputs are TTL-
compatible. The GS70328 is available in 300 mil, 28-pin SOJ
and 8 x 13.4 mm
2
, 28-pin TSOP Type-I packages.
Pin Configuration
Top view
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
1
DQ
2
DQ
3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
300 mil
SOJ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
OE
A
11
A
9
A
8
A
13
WE
V
DD
A
14
A
12
A
7
A
6
A
5
A
4
A
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
10
CE
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
V
SS
DQ
3
DQ
2
DQ
1
A
0
A
1
A
2
28- pin
8 x 13.4 TSOP I
Rev: 1.11a 2/2006
1/11
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Block Diagram
A
0
Address
Input
Buffer
Row
Decoder
Memory Array
A
14
CE
WE
OE
Control
Column
Decoder
I/O Buffer
DQ
1
DQ
8
Truth Table
CE
H
L
L
L
X: “H” or “L”
OE
X
L
X
H
WE
X
H
L
H
DQ
1
to DQ
8
Not Selected
Read
Write
High Z
V
DD
Current
ISB
1
, ISB
2
I
DD
Absolute Maximum Ratings
Parameter
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
Storage temperature
Symbol
V
DD
V
IN
V
OUT
PD
T
STG
Rating
–0.5 to +4.6
–0.5 to V
DD
+ 0.5
(≤ 4.6 V max.)
–0.5 to V
DD
+ 0.5
(≤ 4.6 V max.)
0.7
–55 to 150
Unit
V
V
V
W
o
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.11a 2/2006
2/11
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Recommended Operating Conditions
Parameter
Supply Voltage for -7/8/10/12
Input High Voltage
Input Low Voltage
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
Symbol
V
DD
V
IH
V
IL
T
Ac
T
A
I
Minimum
3.0
2.0
–0.3
0
–40
Typical
3.3
—
—
—
—
Maximum
3.6
V
DD
+ 0.3
0.8
70
85
Unit
V
V
V
o
C
o
C
Notes:
1. Input overshoot voltage should be less than V
DD
+2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
C
IN
C
OUT
Test Condition
V
IN
= 0 V
V
OUT
= 0 V
Maximum
5
7
Unit
pF
pF
Notes:
1. Tested at T
A
= 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Symbol
I
IL
I
LO
V
OH
V
OL
Test Conditions
V
IN
= 0 to V
DD
Output High Z
V
OUT
= 0 to V
DD
I
OH
= –4 mA
I
LO
= +4 mA
Min
–1uA
–1uA
2.4 V
—
Max
1uA
1uA
—
0.4 V
Rev: 1.11a 2/2006
3/11
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Power Supply Currents
Parameter Symbol
Test Conditions
CE
≤
VIL
All other inputs
≥
VIH or
≤
VIL
Min. cycle time
IOUT = 0 mA
CE
≥
VIH
All other inputs
≥
VIH or
≤VIL
Min. cycle time
CE
≥
V
DD
– 0.2 V
All other inputs
≥
V
DD
– 0.2 V or
≤
0.2 V
0 to 70°C
7 ns
8 ns
10 ns 12 ns 15 ns
7 ns
-40 to 85°C
8 ns
10 ns 12 ns 15 ns
Operating
Supply
Current
IDD
75 mA 65 mA 50 mA 50 mA 50 mA 80 mA 70 mA 55 mA 55 mA 55 mA
Standby
Current
ISB1
35 mA 30 mA 25 mA 25 mA 25 mA 40 mA 35 mA 30 mA 30 mA 30 mA
Standby
Current
ISB2
1 mA
2 mA
AC Test Conditions
Parameter
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
Conditions
V
IH
= 2.4 V
V
IL
= 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Output Load 1
DQ
50Ω
VT = 1.4 V
30pF
1
Output Load 2
3.3 V
DQ
5pF
1
589Ω
434Ω
Notes:
1. Include scope and jig capacitance
2. Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted
3. Output load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
Rev: 1.11a 2/2006
4/11
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
Symbol
t
RC
t
AA
t
AC
t
OE
t
OH
t
LZ
*
t
OLZ
*
t
HZ
*
t
OHZ
*
-7
Min
7
—
—
—
2
2
0
—
—
Max
—
7
7
3.5
—
—
—
3.5
3
Min
8
—
—
—
2
2
0
—
—
-8
Max
—
8
8
4
—
—
—
4
3.5
Min
10
—
—
—
2
2
0
—
—
-10
Max
—
10
10
5
—
—
—
5
4
Min
12
—
—
—
3
3
0
—
—
-12
Max
—
12
12
6
—
—
—
6
5
Min
15
—
—
—
3
3
0
—
—
-15
Max
—
15
15
7
—
—
—
7
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
* These parameters are sampled and are not 100% tested
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
t
RC
Address
t
AA
t
OH
Data Out
Previous Data
Data valid
Rev: 1.11a 2/2006
5/11
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Analogue and Mixed Signal
京公网安备 11010802033920号
EEWORLD
