User’s Manual
V850E/IA1
32-bit Single-Chip Microcontrollers
Hardware
μ
PD703116
μ
PD703116(A)
μ
PD703116(A1)
μ
PD70F3116
μ
PD70F3116(A)
μ
PD70F3116(A1)
Document No. U14492EJ6V0UD00 (6th edition)
Date Published February 2008 N
1999, 2002
Printed in Japan
[MEMO]
2
User’s Manual U14492EJ6V0UD
NOTES FOR CMOS DEVICES
1
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between V
IL
(MAX) and V
IH
(MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between V
IL
(MAX) and
V
IH
(MIN).
2
HANDLING OF UNUSED INPUT PINS
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to V
DD
or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
3
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred.
Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded.
The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
4
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
5
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
6
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
User’s Manual U14492EJ6V0UD
3
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Diversion contrary to the law of that country is prohibited.
•
The information in this document is current as of December, 2007. The information is subject to
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•
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•
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•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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•
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redundancy, fire-containment and anti-failure features.
•
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defined above).
M8E 02. 11-1
4
User’s Manual U14492EJ6V0UD
INTRODUCTION
Readers
This manual is intended for users who wish to understand the functions of the
V850E/IA1 and design application systems using it.
The target products are as follows.
• Standard products:
μ
PD703116, 70F3116
• Special products:
μ
PD703116(A), 703116(A1), 70F3116(A), 70F3116(A1)
Purpose
This manual introduces the hardware functions of the V850E/IA1 shown below for
user’s understanding.
Organization
This manual is divided into two parts:
(V850E1 Architecture User’s Manual).
Hardware (this manual) and Architecture
Hardware
•
Pin functions
•
CPU function
•
Internal peripheral functions
•
Flash memory programming
•
Electrical specifications
How to Read This Manual
Architecture
•
Data type
•
Register set
•
Instruction format and instruction set
•
Interrupt and exception
•
Pipeline operation
It is assumed that the readers of this manual have general knowledge in the fields of
electrical engineering, logic circuits, and microcontrollers.
Cautions 1. The application examples in this manual apply to “standard”
quality grade products for general electronic systems.
“special”
quality
grade
product,
thoroughly
When
the
using an example in this manual for an application that requires a
evaluate
component and circuit to be actually used to see if they satisfy the
special quality grade.
2. When using this manual as a manual for a special grade product,
read the part numbers as follows.
μ
PD703116
→
703116(A), 703116(A1)
μ
PD70F3116
→
70F3116(A), 70F3116(A1)
•
To understand the overall functions of the V850E/IA1
→
Read this manual according to the
CONTENTS.
•
To find the details of a register where the name is known
→
Refer to
APPENDIX B REGISTER INDEX.
User’s Manual U14492EJ6V0UD
5
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