SN74LS166N datasheet, PDF - EEWORLD Datasheet

SN74LS166N: DescriptionLS SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16, 648-08; Categorylogic logic; File Size76KB，4 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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SN74LS166N Overview

LS SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16, 648-08

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Reach Compliance Code	unknown
Other features	CLOCK INHIBIT
Counting direction	RIGHT
series	LS
JESD-30 code	R-PDIP-T16
JESD-609 code	e0
length	19.175 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	PARALLEL IN SERIAL OUT
Maximum Frequency@Nom-Sup	25000000 Hz
Number of digits	8
Number of functions	1
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Maximum supply current (ICC)	38 mA
propagation delay (tpd)	35 ns
Certification status	Not Qualified
Maximum seat height	4.44 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	25 MHz
Base Number Matches	1

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