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74LCX32500G

Description
Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
Categorylogic    logic   
File Size85KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74LCX32500G Overview

Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

74LCX32500G Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeBGA
package instruction5.50 MM, PLASTIC, MO-205, FBGA-114
Contacts114
Reach Compliance Codecompli
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesLVC/LCX/Z
JESD-30 codeR-PBGA-B114
JESD-609 codee0
length16 mm
Logic integrated circuit typeBUS TRANSCEIVER
MaximumI(ol)0.024 A
Humidity sensitivity level3
Number of digits36
Number of functions1
Number of ports2
Number of terminals114
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Encapsulate equivalent codeBGA114,6X19,32
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
method of packingTRAY
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su6 ns
propagation delay (tpd)8.4 ns
Certification statusNot Qualified
Maximum seat height1.4 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
Trigger typeNEGATIVE EDGE
width5.5 mm
Base Number Matches1
74LCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs
April 2001
Revised June 2002
74LCX32500
Low Voltage 36-Bit Universal Bus Transceivers
with 5V Tolerant Inputs and Outputs
General Description
These 36-bit universal bus transceivers combine D-type
latches and D-type flip-flops to allow data flow in transpar-
ent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs.
The LCX32500 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with the capability of interfacing to a 5V
signal environment.
The LCX32500 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
6.0 ns t
PD
max (V
CC
=
3.3V), 20
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±
24 mA output drive (V
CC
=
3.0V)
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE tied to GND through a resistor: the minimum
value or the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74LCX32500G
(Note 2)(Note 3)
Package Number
BGA114A
Package Description
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 2:
Ordering code “G” indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2002 Fairchild Semiconductor Corporation
DS500406
www.fairchildsemi.com

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74LCX32500G 74LCX32500
Description Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

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