The AS7C1024 is a high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) organized as 131,072 words × 8 bits. It
is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 10/12/15/20/25/35 ns with output enable access times (t
OE
) of 3/3/4/5/6/8 ns
are ideal for high performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-
bank memory systems.
When CE1 is HIGH or CE2 is LOW the device enters standby mode. The standard AS7C1024 is guaranteed not to exceed 55 mW power
consumption in standby mode; the L version is guaranteed not to exceed 11 mW, and typically requires only 5 mW. The L version also
offers 2.0V data retention.
A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0-I/O7 is written
on the rising edge of WE (write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external
devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) HIGH. The chip
drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is
active, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply. The AS7C1024 is packaged in common industry
standard packages.
Absolute maximum ratings
Parameter
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Temperature under bias
DC output current
Symbol
V
t
P
D
T
stg
T
bias
I
out
Min
–0.5
–
–55
–10
–
Max
+7.0
1.0
+150
+85
20
Unit
V
W
o
C
o
C
mA
Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute max-
imum rating conditions for extended periods may affect reliability.
Truth table
CE1
H
X
L
L
L
CE2
X
L
H
H
H
WE
X
X
H
H
L
OE
X
X
H
L
X
Data
High Z
High Z
High Z
D
out
D
in
Mode
Standby (I
SB
, I
SB1
)
Standby (I
SB
, I
SB1
)
Output disable
Read
Write
Key: X = Don’t Care, L = LOW, H = HIGH
Recommended operating conditions
Parameter
Supply voltage
Input voltage
†
V
IL
min = –3.0V for pulse width less than t
RC
/2.
(T
a
= 0°C to +70°C)
Symbol
V
CC
GND
V
IH
V
IL
Min
4.5
0.0
2.2
–0.5
†
Typ
5.0
0.0
–
–
Max
5.5
0.0
V
CC
+1
0.8
Unit
V
V
V
V
2
AS7C1024
DC operating characteristics
1
Parameter
Input leakage
current
Output leakage
current
Symbol
|
I
LI
|
|
I
LO
|
Test Conditions
V
CC
= Max,
V
in
= GND to V
CC
CE1 = V
IH
or
CE2 = V
IL
,
V
CC
= Max,
V
out
= GND to V
CC
CE1 = V
IL
, CE2 = V
IH
,
f
=
f
max,
I
out
= 0 mA
CE1 = V
IH
or
CE2 = V
IL
,
f
=
f
max
CE1
≥
V
CC
–0.2V
or
CE2
≤0.2
V,
I
SB1
V
OL
V
OH
V
in
≤
0.2V
or
V
in
≥
V
CC
–0.2V,
(V
CC
= 5V±10%, GND = 0V, T
a
= 0°C to +70°C)
-10
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max Min Max Unit
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