High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
Parameter Name | Attribute value |
Brand Name | Texas Instruments |
Is it lead-free? | Lead free |
Is it Rohs certified? | conform to |
Maker | Texas Instruments |
Parts packaging code | SOIC |
package instruction | SOP, SOP14,.25 |
Contacts | 14 |
Reach Compliance Code | compli |
Factory Lead Time | 1 week |
Samacsys Descripti | Texas Instruments CD74HC107M, Dual, J-K Type Flip Flop, 2 → 6 V, 14-Pin SOIC |
series | HC/UH |
JESD-30 code | R-PDSO-G14 |
JESD-609 code | e4 |
length | 8.65 mm |
Load capacitance (CL) | 50 pF |
Logic integrated circuit type | J-K FLIP-FLOP |
Maximum Frequency@Nom-Su | 20000000 Hz |
MaximumI(ol) | 0.006 A |
Humidity sensitivity level | 1 |
Number of digits | 2 |
Number of functions | 2 |
Number of terminals | 14 |
Maximum operating temperature | 125 °C |
Minimum operating temperature | -55 °C |
Output polarity | COMPLEMENTARY |
Package body material | PLASTIC/EPOXY |
encapsulated code | SOP |
Encapsulate equivalent code | SOP14,.25 |
Package shape | RECTANGULAR |
Package form | SMALL OUTLINE |
method of packing | TUBE |
Peak Reflow Temperature (Celsius) | 260 |
power supply | 2/6 V |
Maximum supply current (ICC) | 0.04 mA |
Prop。Delay @ Nom-Su | 51 ns |
propagation delay (tpd) | 255 ns |
Certification status | Not Qualified |
Schmitt trigger | N |
Maximum seat height | 1.75 mm |
Maximum supply voltage (Vsup) | 6 V |
Minimum supply voltage (Vsup) | 2 V |
Nominal supply voltage (Vsup) | 4.5 V |
surface mount | YES |
technology | CMOS |
Temperature level | MILITARY |
Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
Terminal form | GULL WING |
Terminal pitch | 1.27 mm |
Terminal location | DUAL |
Maximum time at peak reflow temperature | NOT SPECIFIED |
Trigger type | NEGATIVE EDGE |
width | 3.9 mm |
minfmax | 23 MHz |
Base Number Matches | 1 |