HYMD525G726BSP4-K datasheet, PDF

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HYMD525G726BSP4-K: DescriptionDDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184; Categorystorage storage; File Size217KB，18 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/; Environmental Compliance

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HYMD525G726BSP4-K Overview

DDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184

HYMD525G726BSP4-K Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SK Hynix
Parts packaging code	DIMM
package instruction	DIMM, DIMM184
Contacts	184
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N184
memory density	9663676416 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM184
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	0.81 A
Maximum slew rate	8.21 mA
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	20
Base Number Matches	1

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184pin Registered DDR SDRAM DIMMs based on 512Mb B ver. (TSOP)

This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 512Mb B ver. DDR SDRAMs in 400mil.

TSOP II packages on a 184pin glass-epoxy substrate. This Hynix 512Mb B ver. based Registered DIMM series provide

a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange

and addition.

FEATURES

•

JEDEC Standard 184-pin dual in-line memory module

(DIMM)

Two ranks 256M x 72 organization

Error Check Correction (ECC) Capability

2.5V

0.2V VDD and VDDQ Power supply for

DDR333 and below

All inputs and outputs are compatible with SSTL_2

interface

Fully differential clock operations (CK & /CK) with

100/133 MHz

DLL aligns DQ and DQS transition with CK transition

Programmable CAS Latency: DDR200(2 clock),

DDR266(2, 2.5 clock)

•

Programmable Burst Length 2 / 4 / 8 with both

sequential and interleave mode

Edge-aligned DQS with data outs and Center-aligned

DQS with data inputs

Auto refresh and self refresh supported

8192refresh cycles / 64ms

Serial Presence Detect (SPD) with EEPROM

Built with 512Mb DDR SDRAMs in 400 mil TSOP II

packages

Lead-free product listed for each configuration

(RoHS compliant)

ADDRESS TABLE

Organization

2GB

128M x 72

Ranks

SDRAMs

128Mb x 4 (Stacked)

# of

DRAMs

# of row/bank/column Address

13(A0~A12)/2(BA0,BA1)/12(A0~A9,A11,A12)

Refresh

Method

8K / 64ms

PREFORMANCE

Part-Number Suffix

Speed Bin

CL - tRCD- tRP

CL=3

Max Clock

Frequency

CL=2.5

CL=2

-K

DDR266A

2-3-3

133

-H

DDR266B

2.5-3-3

133

-L

DDR200

2-2-2

100

Unit

MHz

Rev. 1.1 / May. 2005

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

HYMD525G726BSP4-K Related Products

	HYMD525G726BSP4-K	HYMD525G726BSP4-H	HYMD525G726BSP4M-K	HYMD525G726BSP4M-H	HYMD525G726BS4M-K
Description	DDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184	DDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184	DDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184	DDR DRAM Module, 128MX72, 0.75ns, CMOS, ROHS COMPLIANT, DIMM-184	DDR DRAM Module, 128MX72, 0.75ns, CMOS, DIMM-184
Is it Rohs certified?	conform to	conform to	conform to	conform to	incompatible
Maker	SK Hynix	SK Hynix	SK Hynix	SK Hynix	SK Hynix
Parts packaging code	DIMM	DIMM	DIMM	DIMM	DIMM
package instruction	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184
Contacts	184	184	184	184	184
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	0.75 ns	0.75 ns	0.75 ns	0.75 ns	0.75 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184
memory density	9663676416 bit	9663676416 bit	9663676416 bit	9663676416 bit	9663676416 bit
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	72	72	72	72	72
Number of functions	1	1	1	1	1
Number of ports	1	1	1	1	1
Number of terminals	184	184	184	184	184
word count	134217728 words	134217728 words	134217728 words	134217728 words	134217728 words
character code	128000000	128000000	128000000	128000000	128000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C
organize	128MX72	128MX72	128MX72	128MX72	128MX72
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM
Encapsulate equivalent code	DIMM184	DIMM184	DIMM184	DIMM184	DIMM184
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260	260	260	260	NOT SPECIFIED
power supply	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192
self refresh	YES	YES	YES	YES	YES
Maximum standby current	0.81 A	0.81 A	0.81 A	0.81 A	0.81 A
Maximum slew rate	8.21 mA	8.21 mA	8.21 mA	8.21 mA	8.21 mA
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	20	20	20	20	NOT SPECIFIED
Base Number Matches	1	1	1	1	1

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