Loadable PLD, 0.8ns, CMOS, PBGA484, 23 X 23 MM, 1 MM PITCH, FINE LINE, BGA-484
Parameter Name | Attribute value |
Maker | Altera (Intel) |
Parts packaging code | BGA |
package instruction | BGA, |
Contacts | 484 |
Reach Compliance Code | unknown |
JESD-30 code | S-PBGA-B484 |
JESD-609 code | e1 |
length | 23 mm |
Number of I/O lines | 369 |
Number of terminals | 484 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 369 I/O |
Output function | MIXED |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Package shape | SQUARE |
Package form | GRID ARRAY |
Programmable logic type | LOADABLE PLD |
propagation delay | 0.8 ns |
Certification status | Not Qualified |
Maximum seat height | 2.1 mm |
Maximum supply voltage | 2.625 V |
Minimum supply voltage | 2.375 V |
Nominal supply voltage | 2.5 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal surface | TIN SILVER COPPER |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
width | 23 mm |
Base Number Matches | 1 |