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V54C316162VBST-5

Description
Synchronous DRAM, 1MX16, 5ns, CMOS, PDSO50
Categorystorage    storage   
File Size324KB,21 Pages
ManufacturerMosel Vitelic Corporation ( MVC )
Websitehttp://www.moselvitelic.com
Download Datasheet Parametric Compare View All

V54C316162VBST-5 Overview

Synchronous DRAM, 1MX16, 5ns, CMOS, PDSO50

V54C316162VBST-5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMosel Vitelic Corporation ( MVC )
package instructionTSOP, TSOP50,.46,32
Reach Compliance Codeunknown
Maximum access time5 ns
Maximum clock frequency (fCLK)200 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G50
JESD-609 codee0
memory density16777216 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width16
Number of terminals50
word count1048576 words
character code1000000
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP
Encapsulate equivalent codeTSOP50,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
Continuous burst length1,2,4,8,FP
Maximum standby current0.002 A
Maximum slew rate0.16 mA
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Base Number Matches1

V54C316162VBST-5 Related Products

V54C316162VBST-5 V54C316162VBST-55 V54C316162VBST-7
Description Synchronous DRAM, 1MX16, 5ns, CMOS, PDSO50 Synchronous DRAM, 1MX16, 5.3ns, CMOS, PDSO50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50
Is it Rohs certified? incompatible incompatible incompatible
Maker Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC )
package instruction TSOP, TSOP50,.46,32 TSOP, TSOP50,.46,32 TSOP, TSOP50,.46,32
Reach Compliance Code unknown unknown unknown
Maximum access time 5 ns 5.3 ns 5.5 ns
Maximum clock frequency (fCLK) 200 MHz 182 MHz 143 MHz
I/O type COMMON COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8 1,2,4,8
JESD-30 code R-PDSO-G50 R-PDSO-G50 R-PDSO-G50
JESD-609 code e0 e0 e0
memory density 16777216 bit 16777216 bit 16777216 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM
memory width 16 16 16
Number of terminals 50 50 50
word count 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000
Maximum operating temperature 70 °C 70 °C 70 °C
organize 1MX16 1MX16 1MX16
Output characteristics 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP TSOP TSOP
Encapsulate equivalent code TSOP50,.46,32 TSOP50,.46,32 TSOP50,.46,32
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
power supply 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified
refresh cycle 4096 4096 4096
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.002 A 0.002 A 0.002 A
Maximum slew rate 0.16 mA 0.155 mA 0.14 mA
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm 0.8 mm
Terminal location DUAL DUAL DUAL
Base Number Matches 1 1 1
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