QS74FCT16543T, 162543T
Q
Q
UALITY
S
EMICONDUCTOR,
I
NC.
FEATURES/BENEFITS
High-Speed CMOS
16-Bit Latched Transceiver
QS74FCT16543T
QS74FCT162543T
DESCRIPTION
The FCT16543 family of products are 16-bit latched
bus transceivers with three-state outputs that are
ideal for driving address and data buses. Two inde-
pendent 8-bit D-type latched transceivers are used
with separate input and output control to permit
independent control of data flow in either direction.
Easy board layout is facilitated by the use of flow-
through pinouts and byte enable controls provide
architectural flexibility for systems designers. All
outputs have ground bounce suppression circuitry
(see QSI Application Note AN-01) and many power
and ground pins provide low ground bounce. To
accommodate hot-plug or live insertion applications,
both versions of this product were designed not to
load an active bus when V
CC
is removed. In applica-
tions where bus signals are point-to-point or driving
light capacitance loads, the balanced drive
FCT162543 is recommended.
• Pin and function compatible with T.I.
Widebus™ and IDT Double-Density™ families
• CMOS power levels: <1µW typical standby
• SSOP (PV) and TSSOP (PA) packages
• Low output skew: 0.5ns t
SK
(
O
)
• Flow-through pinout for easy layout
• Power off disable allows hot plugging
• Industrial temperature: –40°C to +85°C
• Input hysteresis for noise immunity
• Multiple power and ground pins for low noise
FCT16543T
• High drive standard FCT-T outputs:
I
OL
= +64mA, I
OH
= –32mA
• Incident switching for driving buses and large
loads
FCT162543T
• Balanced output drivers:
±24mA
• Reduced switching noise for point to point
signals
om
C
ny
pa
o
N
1OEBA
1CEBA
1LEBA
1OEAB
1CEAB
1LEAB
an
w
2OEBA
2CEBA
2LEBA
2OEAB
2CEAB
2LEAB
C
C
2An
D
C
D
1Bn
C
D
D
2Bn
Figure 1. Functional Block Diagram
1An
To 7 Other Channels
To 7 Other Channels
MDSL-00074-01
MARCH 10, 1998
QUALITY SEMICONDUCTOR, INC.
1
QS74FCT16543T, 162543T
Figure 2. Pin Configuration
(All Pins Top View)
SSOP, TSSOP
1OEAB
1LEAB
1CEAB
GND
1A1
1A2
V
CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2CEAB
2LEAB
2OEAB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEBA
1LEBA
1CEBA
GND
1B1
1B2
V
CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
2CEBA
2LEBA
2OEBA
Table 1. Pin Description
Name
xOEAB
xOEBA
xCEAB
xCEBA
xLEAB
xLEBA
xAx
xBx
Description
A to B Output Enable Inputs (Active LOW)
B to A Output Enable Inputs (Active LOW)
A to B Enable Inputs (Active LOW)
B to A Enable Inputs (Active LOW)
A to B Latch Enable Inputs (Active LOW)
B to A Latch Enable Inputs (Active LOW)
A to B Data Inputs or B to A 3-State Outputs
B to A Data Inputs or A to B 3-State Outputs
om
C
ny
pa
o
N
an
w
xOEAB
OEAB
X
X
H
L
L
Latch
Status
xAx to xBx
Storing
Storing
X
Transparent
Storing
Output
Buffers
xBx
High-Z
X
High-Z
Current A Inputs
Previous* A Inputs
Table 2. Function Table
Inputs
xLEAB
LEAB
X
H
X
L
H
xCEAB
CEAB
H
X
X
L
L
Notes:
1. * = Before xLEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
2. A-to-B data flow shown: B-to-A flow control is the same, except using xCEBA, xLEBA, xOEBA
2
QUALITY SEMICONDUCTOR, INC.
MDSL-00074-01
MARCH 10, 1998
QS74FCT16543T, 162543T
Table 3. Absolute Maximum Ratings
Supply Voltage to Ground ............................................... –0.5V to +7.0V
DC Output Voltage V
OUT
................................................ –0.5V to +7.0V
DC Input Voltage V
IN
....................................................... –0.5V to +7.0V
AC Input Voltage (for a pulse width
≤
20ns) ................................. –3.0V
DC Input Diode Current with V
IN
< 0 V ........................................ –20mA
DC Output Diode Current with V
OUT
< 0 V .................................. –50mA
DC Output Current Max. Sink Current/Pin .................................. 120mA
Maximum Power Dissipation ................................................... 1.0 watts
T
STG
Storage Temperature ............................................. –65° to +150°C
Note:
Stresses greater than
those listed under ABSOLUTE
MAXIMUM RATINGS may
cause permanent damage to
this device resulting in func-
tional or reliability type failures.
Table 4. DC Electrical Characteristics Over Operating Range
Recommended Operating Ranges apply unless otherwise noted.
Symbol
V
IH
V
IL
∆V
T
| I
IH
|
| I
IL
|
| I
OZ
|
| I
OFF
|
I
OS
V
IK
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Hysteresis
Input Current
Input HIGH or LOW
Off-State Output
Current (Hi-Z)
Test Conditions
(1)
Logic HIGH for All Inputs
Logic LOW for All Inputs
V
TLH
– V
THL
for All Inputs
(4)
V
CC
= Max., 0
≤
V
IN
< V
CC
Min
2.0
om
C
—
—
—
—
—
–80
–
ny
pa
Typ
(2)
—
—
Max
—
0.8
—
1
1
1
–225
–1.2
100
—
—
—
–140
–0.7
Unit
V
V
mV
µA
µA
µA
mA
V
V
CC
= Max., 0
≤
V
OUT
≤
V
CC
V
CC
= 0V, V
IN
/
OUT
≤
4.5V
(5)
V
CC
= Max., V
OUT
= GND
(3,4)
V
CC
= Min., I
IN
= –18mA
Power off leakage
Notes:
1. For conditions shown as Min. or Max. use appropriate value specified under Recommended Operating Conditions
for the applicable device type.
2. Typical values indicate V
CC
= 5.0V and T
A
= 25°C.
3. Not more than one output should be tested at one time. Duration of test should not exceed one second.
4. These parameters are guaranteed by design but not tested.
5. The test limit for this parameter is
±
5µA at T
A
= –55°C
ow
N
Short Circuit Current
Input Clamp Voltage
an
Table 5. Capacitance
T
A
= 25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V
Pins
All
Typ
6.0
Max
9.0
Unit
pF
MDSL-00074-01
MARCH 10, 1998
QUALITY SEMICONDUCTOR, INC.
3
QS74FCT16543T, 162543T
Table 6. Recommended Operating Conditions
Symbol
V
CC
V
IN
V
OUT
∆t/∆v
T
A
Parameter
Supply Voltage
Input Voltage
Voltage Applied to Output or I/O
Input Transition Slew Rate
Operating Free Air Tempeature
Min
4.5
0
0
—
–40
Max
5.5
V
CC
V
CC
10
+85
Unit
V
V
V
ns/V
°C
Table 7. Output Drive Characteristics for FCT16543T
Symbol
V
OH
Parameter
Output HIGH Voltage
Test Conditions
(1)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –3mA
I
OH
= –15mA
I
OH
= –32mA
(4)
I
OL
= 64mA
Min
2.5
2.4
2.0
—
Typ
(2)
3.4
3.2
3.0
0.3
Max
—
—
—
Unit
V
V
V
V
om
C
Min
60
–60
2.4
—
ny
pa
0.55
Max
200
–200
—
0.55
Table 8. Output Drive Characteristics for FCT162543T
Symbol
I
ODL
I
ODH
V
OH
V
OL
ow
N
Parameter
Output LOW Current
an
Test Conditions
(1)
V
CC
= 5V, V
IN
= V
IH
or V
IL
V
OUT
=1.5V
(3)
V
CC
= 5V, V
IN
= V
IH
or V
IL
V
OUT
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –24mA
I
OL
= 24mA
Typ
(2)
115
–115
3.1
0.3
Unit
mA
mA
V
V
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Notes:
1. For conditions shown as Min. or Max. use appropriate value specified under Electrical Characteristics for the
applicable device type.
2. Typical values indicate V
CC
= 5.0V and T
A
= 25°C.
3. Not more than one output should be shorted and the duration is
≤1
second.
4. Duration of the condition should not exceed one second.
4
QUALITY SEMICONDUCTOR, INC.
MDSL-00074-01
MARCH 10, 1998
QS74FCT16543T, 162543T
Figure 9. Power Supply Characteristics
Symbol
I
CCL
I
CCH
I
CCZ
∆I
CC
Q
CCD
Parameter
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
Test Conditions
(1)
V
CC
= Max., V
IN
= GND or V
CC
Typ
(2)
5
Max
500
Unit
µA
V
CC
= Max., V
IN
= 3.4V
(3)
V
CC
= Max., Outputs Open V
IN
= V
CC
One Bit Toggling
V
IN
= GND
@ 50% Duty Cycle
xCEAB and xOEAB = GND,
xCEBA = V
CC
V
CC
= Max., Outputs Open
One Bit Toggling
@ 50% Duty Cycle
f
I
= 10MHz, xCEBA = V
CC
xLEAB, xCEAB and
xOEAB = GND,
V
CC
= Max., Outputs Open
Sixteen Bits Toggling
@ 50% Duty Cycle
f
I
= 2.5MHz, xCEBA = V
CC
xLEAB, xCEAB and
xOEAB = GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
0.5
75
1.5
120
mA
µA/
MHz
I
C
Total Power
Supply Current
(6)
0.8
1.3
1.7
(5)
3.2
(5)
mA
mA
om
C
V
IN
= Vcc
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
ny
pa
3.8
8.3
6.5
(5)
20
(5)
mA
mA
Notes:
1. For conditions shown as Min. or Max., use the appropriate values specified under Recommended Operating Conditions
for applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All Other Inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed by design but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
= I
DYNAMIC
.
I
C
= I
CCQ
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + f
I
N
I
).
I
CCQ
= Quiescent Current (I
CCL
, I
CCH
, and I
CCZ
).
∆I
CC
= Power Supply Current for a TTL-High Input (V
IN
= 3.4V).
D
H
= Duty Cycle for TTL High Inputs.
N
T
= Number of TTL High Inputs.
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL).
f
CP
= Clock Frequency for Register devices (Zero for Non-Register Devices).
N
CP
= Number of Clock Inputs at f
CP
.
f
I
= Input Frequency.
N
I
= Number of Inputs at f
I
.
o
N
an
w
MDSL-00074-01
MARCH 10, 1998
QUALITY SEMICONDUCTOR, INC.
5