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WMS512K8-35CLQ

Description
Standard SRAM, 512KX8, 35ns, CMOS, CQCC32, BRAZED, CERAMIC, LCC-32
Categorystorage    storage   
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

WMS512K8-35CLQ Overview

Standard SRAM, 512KX8, 35ns, CMOS, CQCC32, BRAZED, CERAMIC, LCC-32

WMS512K8-35CLQ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeQFJ
package instructionBRAZED, CERAMIC, LCC-32
Contacts32
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time35 ns
JESD-30 codeR-CQCC-N32
JESD-609 codee4
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formNO LEAD
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
Base Number Matches1
WMS512K8-XXX
512Kx8 MONOLITHIC SRAM, SMD 5962-95613
FEATURES

Access Times 15, 17, 20, 25, 35, 45, 55ns

MIL-STD-883 Compliant Devices Available

Revolutionary, Center Power/Ground Pinout JEDEC
Approved
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flat Pack (Package 226)

Evolutionary, Corner Power/Ground Pinout JEDEC
Approved
• 32 pin Ceramic DIP (Package 300)
• 32 lead Ceramic SOJ (Package 101)
• 32 lead Ceramic Thinpack™ Flat Pack (Package 321)
• 32 pin, Rectangular Ceramic Leadless Chip Carrier
(Package 601)
• Commercial, Industrial and Military Temperature Range
• 5V Power Supply
• Low Power CMOS
• Low Power Data Retention for Battery Back-up Operation
• TTL Compatible Inputs and Outputs
*This product is subject to change without notice.
REVOLUTIONARY PINOUT
36 FLAT PACK
36 CSOJ
TOP VIEW
A0
A1
A2
A3
A4
CS#
I/O0
I/O1
V
CC
V
SS
I/O2
I/O3
WE#
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
32 FLAT PACK (FF)
TOP VIEW
A12
32 CLCC
TOP VIEW
A14
A16
A18
A15
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
V
SS
V
CC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
I/O1
I/O2
I/O3
I/O4
I/O5
PIN DESCRIPTION
A0-18
I/O 0-7
CS#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2012
Rev. 13
© 2012 Microsemi Corporation. All rights reserved.
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
www.whiteedc.com
I/O6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
4 3 2 1 32 31 30
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
V
SS
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
A17
V
CC
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