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UPD44322161GF-A75

Description
Cache SRAM, 2MX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
Categorystorage    storage   
File Size361KB,40 Pages
ManufacturerNEC Electronics
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UPD44322161GF-A75 Overview

Cache SRAM, 2MX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100

UPD44322161GF-A75 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeQFP
package instructionLQFP,
Contacts100
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time7.5 ns
Other featuresFLOW-THROUGH ARCHITECTURE
JESD-30 codeR-PQFP-G100
JESD-609 codee0
length20 mm
memory density33554432 bit
Memory IC TypeCACHE SRAM
memory width16
Number of functions1
Number of terminals100
word count2097152 words
character code2000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2MX16
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.7 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
Base Number Matches1
PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µ
PD44322161, 44322181, 44322321, 44322361
32M-BIT CMOS SYNCHRONOUS FAST SRAM
FLOW THROUGH OPERATION
Description
The
µ
PD44322161 is a 2,097,152-word by 16-bit, the
µ
PD44322181 is a 2,097,152-word by 18-bit, the
µ
PD44322321 is
a 1,048,576-word by 32-bit and the
µ
PD44322361 is a 1,048,576-word by 36-bit synchronous static RAM fabricated with
advanced CMOS technology using Full-CMOS six-transistor memory cell.
The
µ
PD44322161,
µ
PD44322181,
µ
PD44322321 and
µ
PD44322361 integrate unique synchronous peripheral circuitry,
2-bit burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the
single clock input (CLK).
The
µ
PD44322161,
µ
PD44322181,
µ
PD44322321 and
µ
PD44322361 are suitable for applications which require
synchronous operation, high speed, low voltage, high density and wide bit configuration, such as cache and buffer memory.
ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In
the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal operation.
The
µ
PD44322161,
µ
PD44322181,
µ
PD44322321 and
µ
PD44322361 are packaged in 100-pin PLASTIC LQFP with a
1.4 mm package thickness or 165-pin PLASTIC FBGA for high density and low capacitive loading.
Features
3.3 V or 2.5 V core supply
Synchronous operation
Internally self-timed write control
Burst read / write : Interleaved burst and linear burst sequence
Fully registered inputs for flow through operation
All registers triggered off positive clock edge
3.3 V or 2.5 V LVTTL Compatible : All inputs and outputs
Fast clock access time : 6.5 ns (133 MHz), 7.5 ns (117 MHz), 8.5 ns (100 MHz)
Asynchronous output enable : /G
Burst sequence selectable : MODE
Sleep mode : ZZ (ZZ = Open or Low : Normal operation)
Separate byte write enable : /BW1 to /BW4, /BWE (
µ
PD44322321,
µ
PD44322361)
/BW1 to /BW2, /BWE (
µ
PD44322161,
µ
PD44322181)
Global write enable : /GW
Three chip enables for easy depth expansion
Common I/O using three state outputs
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M16026EJ1V0PM00 (1st edition)
Date Published September 2002 NS CP(K)
Printed in Japan
©
2002

UPD44322161GF-A75 Related Products

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Description Cache SRAM, 2MX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100 Cache SRAM, 2MX16, 7.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165 Cache SRAM, 2MX16, 6.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100 Cache SRAM, 2MX16, 6.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165 Cache SRAM, 2MX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100 Cache SRAM, 2MX16, 8.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165 Cache SRAM, 2MX16, 7.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165 Cache SRAM, 2MX16, 8.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165 Cache SRAM, 2MX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100 Cache SRAM, 2MX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
Is it lead-free? Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code QFP BGA QFP BGA QFP BGA BGA BGA QFP QFP
package instruction LQFP, LBGA, LQFP, LBGA, LQFP, 15 X 17 MM, PLASTIC, FBGA-165 LBGA, LBGA, LQFP, LQFP,
Contacts 100 165 100 165 100 165 165 165 100 100
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compli compliant compliant
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 7.5 ns 7.5 ns 6.5 ns 6.5 ns 8.5 ns 8.5 ns 7.5 ns 8.5 ns 7.5 ns 8.5 ns
Other features FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE FLOW-THROUGH ARCHITECTURE
JESD-30 code R-PQFP-G100 R-PBGA-B165 R-PQFP-G100 R-PBGA-B165 R-PQFP-G100 R-PBGA-B165 R-PBGA-B165 R-PBGA-B165 R-PQFP-G100 R-PQFP-G100
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0 e0
length 20 mm 17 mm 20 mm 17 mm 20 mm 17 mm 17 mm 17 mm 20 mm 20 mm
memory density 33554432 bit 33554432 bit 33554432 bit 33554432 bit 33554432 bit 33554432 bit 33554432 bit 33554432 bi 33554432 bit 33554432 bit
Memory IC Type CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
memory width 16 16 16 16 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1 1 1 1 1
Number of terminals 100 165 100 165 100 165 165 165 100 100
word count 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words 2097152 words
character code 2000000 2000000 2000000 2000000 2000000 2000000 2000000 2000000 2000000 2000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
organize 2MX16 2MX16 2MX16 2MX16 2MX16 2MX16 2MX16 2MX16 2MX16 2MX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LBGA LQFP LBGA LQFP LBGA LBGA LBGA LQFP LQFP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE GRID ARRAY, LOW PROFILE FLATPACK, LOW PROFILE GRID ARRAY, LOW PROFILE FLATPACK, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.7 mm 1.4 mm 1.7 mm 1.4 mm 1.7 mm 1.4 mm 1.4 mm 1.4 mm 1.7 mm 1.7 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 2.625 V 2.625 V 2.625 V 2.625 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 2.375 V 2.375 V 2.375 V 2.375 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD
Terminal form GULL WING BALL GULL WING BALL GULL WING BALL BALL BALL GULL WING GULL WING
Terminal pitch 0.65 mm 1 mm 0.65 mm 1 mm 0.65 mm 1 mm 1 mm 1 mm 0.65 mm 0.65 mm
Terminal location QUAD BOTTOM QUAD BOTTOM QUAD BOTTOM BOTTOM BOTTOM QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 14 mm 15 mm 14 mm 15 mm 14 mm 15 mm 15 mm 15 mm 14 mm 14 mm
Maker - - NEC Electronics NEC Electronics NEC Electronics NEC Electronics NEC Electronics NEC Electronics NEC Electronics NEC Electronics

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