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U424-TO-78

Description
Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, HERMETIC SEALED, TO-78, 6 PIN
CategoryDiscrete semiconductor    The transistor   
File Size271KB,1 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet Parametric Compare View All

U424-TO-78 Overview

Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, HERMETIC SEALED, TO-78, 6 PIN

U424-TO-78 Parametric

Parameter NameAttribute value
Parts packaging codeTO-78
package instructionCYLINDRICAL, O-MBCY-W6
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
ConfigurationCOMPLEX
Minimum drain-source breakdown voltage40 V
FET technologyJUNCTION
Maximum feedback capacitance (Crss)1.5 pF
JESD-30 codeO-MBCY-W6
Number of components2
Number of terminals6
Operating modeDEPLETION MODE
Package body materialMETAL
Package shapeROUND
Package formCYLINDRICAL
Polarity/channel typeN-CHANNEL
surface mountNO
Terminal formWIRE
Terminal locationBOTTOM
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
U424
HIGH INPUT IMPEDANCE
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix U424
The U424 is a high input impedance Monolithic Dual N-Channel JFET
The U424 monolithic dual n-channel JFET is designed
to provide very high input impedance for differential
amplification and impedance matching. Among its
many unique features, this series offers operating gate
current specified at -500 fA. The U424 is a direct
replacement for discontinued Siliconix U424.
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications. The 8 Pin P-DIP
and 8 Pin SOIC provide ease of manufacturing, and the
symmetrical pinout prevents improper orientation.
(See Packaging Information).
FEATURES 
HIGH INPUT IMPEDANCE 
HIGH GAIN 
LOW POWER OPERATION 
ABSOLUTE MAXIMUM RATINGS  
@ 25°C (unless otherwise noted) 
I
= 0.25pA MAX 
gfs = 120µmho MIN 
V
GS(OFF) 
= 2V MAX 
U424 Applications:
Ultra Low Input Current Differential Amps
High-Speed Comparators
Impedance Converters
Maximum Temperatures 
Storage Temperature 
‐65°C to +150°C 
Operating Junction Temperature 
+150°C 
Maximum Voltage and Current for Each Transistor – Note 1 
‐V
GSS
 
Gate Voltage to Drain or Source 
40V 
‐V
DSO
 
Drain to Source Voltage 
40V 
‐I
G(f)
 
Gate Forward Current 
10mA 
Maximum Power Dissipation 
Device Dissipation @ Free Air – Total                 400mW @ +125°C 
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
SYMBOL 
CHARACTERISTICS  VALUE  UNITS  CONDITIONS 
|∆V 
GS1‐2 
/∆T|max. 
DRIFT VS. 
10 
µV/°C  V
DG
=10V, I
D
=30µA 
TEMPERATURE 
T
A
=‐55°C to +125°C 
| V 
GS1‐2 
| max. 
OFFSET VOLTAGE 
10 
mV 
V
DG
=10V, I
D
=30µA 
TYP. 
60 
‐‐ 
 
‐‐ 
200 
 
‐‐ 
 
‐‐ 
‐‐ 
 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
 
‐‐ 
0.1 
 
90 
90 
 
‐‐ 
20 
10 
 
‐‐ 
‐‐ 
MAX. 
‐‐ 
‐‐ 
 
1500 
350 
 
1000 
 
2.0 
1.8 
 
.25 
250 
1.0 
1.0 
 
10 
3.0 
 
‐‐ 
‐‐ 
 
70 
‐‐ 
 
3.0 
1.5 
UNITS 
 
µmho 
µmho 
 
µA 
 
 
pA 
pA 
pA 
nA 
 
µmho 
µmho 
 
dB 
dB 
 
dB 
nV/√Hz 
 
 
pF 
pF 
CONDITIONS 
V
DS 
= 0                  I
G
=1nA 
      I
= 1µA               I
D
= 0               I
S
= 0 
 
V
DS 
= 10V         V
GS
= 0V      f = 1kHz 
     V
DG 
= 10V          I
D
= 30µA    f = 1kHz 
 
V
DS 
= 10V              V
GS
= 0V 
 
V
DS 
= 10V               I
D
= 1nA 
            V
DG 
= 10V                 I
D
= 30µA 
 
  V
DG 
= 10V               I
D
= 30µA 
T
= +125°C
 
V
DS 
= 0V             V
GS
= 20V 
T
= +125°C 
 
 
V
DS 
= 10V              V
GS
= 0V 
 V
DG 
=  10V             I
D
= 30µA 
 
∆V
DS 
= 10 to 20V        I
D
= 30µA 
∆V
DS 
= 5 to 10V          I
D
= 30µA 
V
DG 
= 10V     I
= 30µA     R
= 10MΩ 
f = 10Hz            
    V
DG 
= 10V     I
= 30µA      f = 10Hz   
    V
DG  
= 10V    I
= 30µA      f = 1KHz   
 
V
DS
= 10V       V
GS
= 0     f = 1MHz 
 
P-DIP / SOIC (Top View)
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTICS 
MIN. 
BV
GSS
 
Breakdown Voltage 
40 
BV
GGO
 
Gate‐To‐Gate Breakdown 
40 
 
TRANSCONDUCTANCE 
 
Y
fSS
 
Full Conduction 
300 
Y
fS
 
Typical Operation 
120 
DRAIN CURRENT 
 
 
I
DSS
 
Full Conduction 
60 
GATE VOLTAGE 
 
 
V
GS(off)
 
Pinchoff voltage 
‐‐ 
V
GS
 
Operating Range 
‐‐ 
 
GATE CURRENT 
 
I
G
max. 
Operating 
‐‐ 
‐I
G
max. 
High Temperature 
‐‐ 
I
GSS
max. 
At Full Conduction 
‐‐ 
‐I
GSS
max. 
High Temperature 
‐‐ 
 
 
OUTPUT CONDUCTANCE 
Y
OSS
 
Full Conduction 
‐‐ 
Y
OS
 
Operating 
‐‐ 
 
COMMON MODE REJECTION 
 
CMR 
‐20 log | ∆V 
GS1‐2
/ ∆V
DS
‐‐ 
 
‐20 log | ∆V 
GS1‐2
/ ∆V
DS
‐‐ 
 
NOISE 
 
NF 
Figure 
‐‐ 
e
n
 
Voltage 
‐‐ 
 
 
‐‐ 
CAPACITANCE 
 
 
C
ISS
 
Input 
‐‐ 
C
RSS
 
Reverse Transfer 
‐‐ 
Click To Buy
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
TO-71 / TO-78 (Top View)
Available Packages:
U424 in TO-71 & TO-78
U424 in PDIP & SOIC
U424 available as bare die
Please contact
Micross
for full package and die dimensions
Email:
chipcomponents@micross.com
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

U424-TO-78 Related Products

U424-TO-78 U424 U424-PDIP-8 U424-SOIC-8 U424-TO-71
Description Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, HERMETIC SEALED, TO-78, 6 PIN Low Leakage, Low Drift, Monolithic Dual, N-Channel JFET, TO-71 Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, PLASTIC, DIP-8 Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, SOIC-8 Small Signal Field-Effect Transistor, 40V, 2-Element, N-Channel, Silicon, Junction FET, HERMETIC SEALED, TO-71, 6 PIN
Reach Compliance Code compliant compliant compliant compliant compliant
Base Number Matches 1 1 1 1 1
Parts packaging code TO-78 - DIP SOT TO-71
package instruction CYLINDRICAL, O-MBCY-W6 - IN-LINE, R-PDIP-T8 SMALL OUTLINE, R-PDSO-G8 CYLINDRICAL, O-MBCY-W6
Contacts 8 - 8 8 6
ECCN code EAR99 - EAR99 EAR99 EAR99
Configuration COMPLEX - COMPLEX COMPLEX COMPLEX
Minimum drain-source breakdown voltage 40 V - 40 V 40 V 40 V
FET technology JUNCTION - JUNCTION JUNCTION JUNCTION
Maximum feedback capacitance (Crss) 1.5 pF - 1.5 pF 1.5 pF 1.5 pF
JESD-30 code O-MBCY-W6 - R-PDIP-T8 R-PDSO-G8 O-MBCY-W6
Number of components 2 - 2 2 2
Number of terminals 6 - 8 8 6
Operating mode DEPLETION MODE - DEPLETION MODE DEPLETION MODE DEPLETION MODE
Package body material METAL - PLASTIC/EPOXY PLASTIC/EPOXY METAL
Package shape ROUND - RECTANGULAR RECTANGULAR ROUND
Package form CYLINDRICAL - IN-LINE SMALL OUTLINE CYLINDRICAL
Polarity/channel type N-CHANNEL - N-CHANNEL N-CHANNEL N-CHANNEL
surface mount NO - NO YES NO
Terminal form WIRE - THROUGH-HOLE GULL WING WIRE
Terminal location BOTTOM - DUAL DUAL BOTTOM
transistor applications SWITCHING - SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON - SILICON SILICON SILICON
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