STF6N62K3(045Y)
N-channel 620 V, 1.1
Ω
typ., 5.5 A MDmesh™ K3
Power MOSFET in a TO-220FP narrow leads package
Datasheet
-
production data
Features
Order code
V
DS
R
DS(on)
max.
1.28
Ω
I
D
P
TOT
STF6N62K3(045Y) 620 V
5.5 A 25 W
•
100% avalanche tested
•
Extremely high dv/dt capability
3
1
2
•
Gate charge minimized
•
Very low intrinsic capacitance
•
Improved diode reverse recovery
characteristics
•
Zener-protected
TO-220FP narrow leads
Figure 1. Internal schematic diagram
D(2)
Applications
•
Switching applications
Description
G(1)
S(3)
AM01476v1
This MDmesh™ K3 Power MOSFET is the result
of improvements applied to SuperMESH™
technology, combined with an optimized vertical
structure. This device boasts extremely low on-
resistance, superior dynamic performance and
high avalanche capability, rendering it suitable for
the most demanding applications.
Table 1. Device summary
Order code
STF6N62K3(045Y)
Marking
6N62K3
Packages
TO-220FP narrow leads
Packaging
Tube
September 2014
This is information on a product in full production.
DocID16556 Rev 2
1/12
www.st.com
Contents
STF6N62K3(045Y)
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
Test circuits
.............................................. 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STF6N62K3(045Y)
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
V
DS
V
GS
I
D
I
D
I
DM (2)
P
TOT
ESD
dv/dt
(3)
V
ISO
T
stg
T
j
Parameter
Drain-source voltage
Gate- source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Gate-source human body model
(C = 100 pF, R = 1.5 kΩ)
Peak diode recovery voltage slope
Insulation withstand voltage (RMS) from all
three leads to external heat sink
(t = 1 s; T
C
= 25 °C)
Storage temperature
Max. operating junction temperature
Value
620
± 30
5.5
(1)
3.5
(1)
22
(1)
25
2500
9
2500
-55 to 150
150
Unit
V
V
A
A
A
W
V
V/ns
V
°C
°C
1. Limited by package
2. Pulse width limited by safe operating area
3. I
SD
≤
5.5 A, di/dt
≤
200 A/µs, V
DD
= 80% V
(BR)DSS
Table 3. Thermal data
Symbol
R
thj-case
R
thj-amb
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Value
5
62.5
Unit
°C/W
°C/W
Table 4. Avalanche characteristics
Symbol
I
AR
E
AS
Parameter
Avalanche current, repetitive or not-
repetitive (pulse width limited by T
j
max)
Single pulse avalanche energy
(starting T
j
= 25°C, I
D
= I
AR
, V
DD
= 50V)
Max value
5.5
140
Unit
A
mJ
DocID16556 Rev 2
3/12
12
Electrical characteristics
STF6N62K3(045Y)
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source
breakdown voltage
(V
GS
= 0)
Test conditions
I
D
= 1 mA
Min.
620
1
50
± 10
3
3.75
1.1
4.5
1.28
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on
V
DS
= 620 V
Zero gate voltage
drain current (V
GS
= 0) V
DS
= 620 V, T
C
=125 °C
Gate-body leakage
current (V
DS
= 0)
V
GS
= ± 20 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 50 µA
Static drain-source on
resistance
V
GS
= 10 V, I
D
= 2.8 A
Table 6. Dynamic
Symbol
C
iss
C
oss
C
rss
C
OSS eq(1)
R
G
Q
g
Q
gs
Q
gd
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
GS
= 0, V
DS
= 0 to 496 V
f = 1 MHz open drain
V
DD
= 496 V, I
D
= 5.5 A,
V
GS
= 10 V
(see
Figure 15)
V
DS
= 50 V, f = 1 MHz, V
GS
= 0
Test conditions
Min.
-
-
-
-
-
-
-
-
Typ.
706
66
8.4
60
4
25.7
4.6
14.4
Max.
-
-
-
-
-
-
-
-
Unit
pF
pF
pF
pF
Ω
nC
nC
nC
1. C
oss eq
. is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
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DocID16556 Rev 2
STF6N62K3(045Y)
Electrical characteristics
Table 7. Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
V
DD
= 310 V, I
D
= 2.75 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(see
Figure 14)
Test conditions
Min.
-
-
-
-
Typ.
13
12.5
27
19
Max
-
-
-
-
Unit
ns
ns
ns
ns
Table 8. Source drain diode
Symbol
I
SD
I
SDM (1)
V
SD (2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 5.5 A, di/dt = 100 A/µs
V
DD
= 30 V, T
j
= 150 °C
(see
Figure 19)
I
SD
= 5.5 A, di/dt = 100 A/µs
V
DD
= 30 V (see
Figure 19)
I
SD
= 5.5 A, V
GS
= 0
Test conditions
Min.
-
-
-
-
-
-
-
-
-
190
970
10.5
255
1520
12
Typ.
Max. Unit
5.5
22
1.6
A
A
V
ns
nC
A
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Table 9. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min
30
Typ.
-
Max.
-
Unit
V
V
(BR)GSO
Gate-source breakdown voltage I
GS
= ± 1mA, I
D
=0
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
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