Cortina Systems
®
IXF3204 Quad T1/E1/
J1 Framer
Datasheet
Product Features
Quad T1/E1/J1 Framer
Software selectable and fully
independent T1/E1/J1 operation
Support for T1/E1/J1 standards:
— T1: T1-SF, T1-ESF, Lucent*
SLC* 96
— E1: PCM30, G.704, G.706, G.732
ISDN PRI
— J1: J1-SF and J1-ESF
Programmable transmit/receive slip
buffers
On-chip Performance Report
Messaging per ANSI T1.231, T1.403,
and ITU G.826
24 fully independent HDLC controllers
with 128-byte transmit/receive FIFOs
support GR-303 and V5.1/5.2
standards
FDL Support:
— DL support for ESF per ANSI
T1.403 or AT&T* TR54016 (T1/
J1)
— DDL bit access for Lucent*
SLC-96
— Sa bit access for E1
256-PBGA package, 17 mm x 17 mm
Operating temperature -40
°C
to 85
°C
Diagnostics:
— BERT generators and analyzers
for extensive on-chip error testing
at DS-0, DS-1, and E1 rates
— Pseudo-random and
programmable bit-sequence
generator and monitoring
— Per-link diagnostics and
loopbacks
Programmable system backplane data
rates at 1x/2x/4x/8x of T1/E1 data rates
for support of MVIP, H-MVIP, H.100,
and CHI
Support for fractional T1/E1
Signaling:
— Support for T1/E1 CAS and T1/E1
CCS
— Signaling state-change indication
— Signaling freeze/debounce per
DS-1
— Signaling force per DS-0
Red/Yellow/AIS alarm indication
Intel*/Motorola* 8-bit processor
interface
Industry-standard P1149.1 JTAG test
port
Low-power 1.8/3.3-V CMOS
technology with 5-V tolerant I/Os
Applications
Integrated Multi-service Access
Platforms (IMAPs)
Integrated Access Devices (IADs)
Inverse Multiplexing for Asynchronous
Transfer Mode (also known as ‘IMA’)
Supports frame-relay access devices
Channel service unit (CSU) / Data
Service Unit (DSU) equipment
Wireless base stations, radio network
controllers
Routers
IXF3204 Framer
Datasheet
278594, Revision 5.0
10 July 2007
Legal Disclaimers
This document contains information proprietary to Cortina Systems, Inc. (Cortina). Any use or disclosure, in whole or in part, of this
information to any unauthorized party, for any purposes other than that for which it is provided is expressly prohibited except as
authorized by Cortina in writing. Cortina reserves its rights to pursue both civil and criminal penalties for copying or disclosure of
this material without authorization.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH CORTINA SYSTEMS
®
PRODUCTS.
NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED BY THIS DOCUMENT.
EXCEPT AS PROVIDED IN CORTINA’S TERMS AND CONDITIONS OF SALE OF SUCH PRODUCTS, CORTINA ASSUMES
NO LIABILITY WHATSOEVER, AND CORTINA DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE
SALE AND/OR USE OF CORTINA PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A
PARTICULAR PURPOSE, MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT.
Cortina products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear
facility applications.
Cortina Systems
®
and the Cortina Systems logo are the trademarks or registered trademarks of Cortina Systems, Inc. and its
subsidiaries in the U.S. and other countries. Other names and brands may be claimed as the property of others.
Copyright © 2001−2007 Cortina Systems, Inc. All rights reserved.
Cortina Systems
®
IXF3204 Quad T1/E1/J1 Framer
Page 2
IXF3204 Framer
Datasheet
278594, Revision 5.0
10 July 2007
Contents
Contents
1.0
Product Summary........................................................................................................................18
1.1
1.2
Description..........................................................................................................................18
Conventions and Terminology ............................................................................................21
1.2.1 Conventions and Terminology for T1/E1 ...............................................................21
1.2.2 Conventions and Nomenclature for the IXF3204 Framer ......................................22
Related Documents ............................................................................................................22
Signal Groupings ................................................................................................................23
Ball Descriptions .................................................................................................................23
2.2.1 Ball Descriptions - Interface to Line Interface Unit.................................................24
2.2.2 Ball Descriptions - Interface to System Backplane Bus .........................................26
2.2.3 Ball Descriptions - Interface to Host Processor .....................................................29
2.2.4 Ball Descriptions - Clock and Clock References....................................................30
2.2.5 Ball Descriptions - Test Interfaces .........................................................................31
2.2.6 Ball Descriptions - Power and Grounds .................................................................32
2.2.7 Ball Descriptions - No Connects ............................................................................34
Feature Set .........................................................................................................................36
Indicators ............................................................................................................................49
Initialization .........................................................................................................................53
Reset ..................................................................................................................................53
Interrupt Handling ...............................................................................................................53
4.3.1 Interrupt Handling - Events Related to Framer Ports.............................................54
4.3.2 Interrupt Handling - Events Related to HDLC and BERT ......................................55
T1 Line Coding ...................................................................................................................56
5.1.1 T1 Alternate Mark Inversion...................................................................................56
5.1.2 T1 Zero Code Suppression....................................................................................57
5.1.3 T1 Binary Eight Zero Substitution ..........................................................................57
T1 Line Monitoring ..............................................................................................................57
5.2.1 T1 Alarm Indication Signal .....................................................................................58
5.2.2 T1 Bipolar Violations ..............................................................................................58
5.2.3 T1 Excess Zeroes ..................................................................................................58
5.2.4 T1 Loss of Signal ...................................................................................................58
T1 Insertion of Line Errors ..................................................................................................58
T1 Framing .........................................................................................................................59
T1 Superframe....................................................................................................................60
5.5.1 T1 SF Mode Description ........................................................................................60
5.5.2 T1 SF Framing Algorithm.......................................................................................61
T1 Lucent* SLC-96 Mode ...................................................................................................61
5.6.1 T1 Lucent* SLC-96 Description .............................................................................61
5.6.2 T1 Lucent* SLC-96 Framing Algorithm ..................................................................64
T1 Extended SuperFrame ..................................................................................................65
5.7.1 T1 ESF Description................................................................................................65
Page 3
1.3
2.0
2.1
2.2
Signal Descriptions .....................................................................................................................23
3.0
Feature Set and Indicators .........................................................................................................36
3.1
3.2
4.0
Initialization, Reset, and Interrupts ............................................................................................53
4.1
4.2
4.3
5.0
T1 Framers ...................................................................................................................................56
5.1
5.2
5.3
5.4
5.5
5.6
5.7
Cortina Systems
®
IXF3204 Quad T1/E1/J1 Framer
IXF3204 Framer
Datasheet
278594, Revision 5.0
10 July 2007
Contents
5.8
5.9
5.10
5.11
5.12
5.13
5.14
5.15
6.0
6.1
5.7.2 T1 ESF CRC-6 Procedures ...................................................................................66
5.7.3 T1 ESF Framing Algorithm ....................................................................................66
T1 General Framing Properties ..........................................................................................68
5.8.1 T1 False Framing Protection .................................................................................68
5.8.2 T1 Maximum Average Reframe Time ....................................................................68
T1 Framing Indicators .........................................................................................................69
5.9.1 T1 Frame Bit Error .................................................................................................69
5.9.2 T1 Out-of-Frame Detection ....................................................................................69
5.9.3 T1 Resynchronization ............................................................................................70
5.9.4 T1 Change Of Frame Alignment ............................................................................70
T1 Frame and Cyclic Redundancy Check Error Insertion ..................................................70
5.10.1 T1 Frame Bit Error Insertion ..................................................................................70
5.10.2 T1 CRC Error Insertion ..........................................................................................70
T1 Alarm Overview .............................................................................................................70
T1 Red Alarm......................................................................................................................70
T1 Yellow Alarm..................................................................................................................71
5.13.1 T1 Yellow Alarm Detection ....................................................................................71
5.13.2 T1 Yellow Alarm Transmission ..............................................................................71
T1 Blue Alarm .....................................................................................................................72
5.14.1 T1 Blue Alarm Detection ........................................................................................72
5.14.2 T1 Blue Alarm Transmission..................................................................................72
Fractional T1 .......................................................................................................................72
J1 Frame Operations ..........................................................................................................73
6.1.1 J1 Frame Operation - Modified 12-Frame Multiframe............................................73
6.1.2 J1 Frame Operation - Modified 24-Frame Multiframe............................................74
J1 Alarm Overview..............................................................................................................75
J1 Yellow Alarm ..................................................................................................................75
6.3.1 J1 Yellow Alarm Detection .....................................................................................76
6.3.2 J1 Yellow Alarm Transmission...............................................................................76
E1 Line Coding ...................................................................................................................77
7.1.1 E1 Alternate Mark Inversion ..................................................................................77
7.1.2 E1 High-Density Bipolar Three ..............................................................................78
E1 Line Monitoring..............................................................................................................78
7.2.1 E1 Alarm Indication Signal.....................................................................................78
7.2.2 E1 Auxiliary Pattern ...............................................................................................78
7.2.3 E1 Coding Violations .............................................................................................79
7.2.4 E1 Loss of Signal ...................................................................................................79
E1 Insertion of Line Errors ..................................................................................................79
E1 Framing .........................................................................................................................80
E1 FAS/NFAS Framing.......................................................................................................80
7.5.1 E1 FAS/NFAS Framing Description.......................................................................80
7.5.2 E1 FAS/NFAS Framing Operation .........................................................................82
7.5.3 E1 FAS/NFAS Error Generation ............................................................................82
E1 CRC-4 Multiframe..........................................................................................................82
7.6.1 E1 CRC-4 Multiframe Description..........................................................................82
7.6.2 E1 CRC-4 Multiframe Operation ............................................................................83
J1 Framers ...................................................................................................................................73
6.2
6.3
7.0
E1 Framers ...................................................................................................................................77
7.1
7.2
7.3
7.4
7.5
7.6
Cortina Systems
®
IXF3204 Quad T1/E1/J1 Framer
Page 4
IXF3204 Framer
Datasheet
278594, Revision 5.0
10 July 2007
Contents
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
8.0
9.0
7.6.3 E1 CRC-4 Multiframe Interworking ........................................................................84
7.6.4 E1 CRC-4 Multiframe Error Checking....................................................................84
7.6.5 E1 Loss of CRC-4 Multiframe Alignment ...............................................................84
7.6.6 E1 CRC-4 Multiframe Transmission ......................................................................84
7.6.7 E1 CRC-4 Error Insertion.......................................................................................85
E1 Remote End Block Error Operation ...............................................................................85
E1 Channel-Associated Signaling Multiframe.....................................................................85
7.8.1 E1 CAS Multiframe Description .............................................................................85
7.8.2 E1 CAS Multiframe Operation ...............................................................................86
7.8.3 E1 Loss of CAS Multiframe....................................................................................86
7.8.4 E1 CAS Multiframe Transmission ..........................................................................87
7.8.5 E1 CAS Multiframe Alignment to FAS/NFAS.........................................................87
E1 Simultaneous CAS and CRC Multiframes .....................................................................87
E1 Alarm Overview .............................................................................................................87
E1 Alarm: Red Alarm ..........................................................................................................88
E1 Alarm: Remote Alarm Indication....................................................................................88
E1 Alarm: TS16 RAI ...........................................................................................................88
E1 Alarm: TS16 AIS............................................................................................................89
E1 Alarm: AIS .....................................................................................................................89
E1 Main Indicators ..............................................................................................................89
7.16.1 E1 Loss of Basic Frame Alignment - FAS/NFAS ...................................................89
7.16.2 E1 Loss of CRC Alignment ....................................................................................90
7.16.3 E1 Loss of CAS Multiframe Alignment...................................................................90
7.16.4 E1 Change of Frame Alignment ............................................................................90
7.16.5 E1 FAS and NFAS Error Counting ........................................................................90
7.16.6 E1 CRC Error Counting .........................................................................................90
E1 Receiver Resynchronization Control .............................................................................91
E1 Sa/Si Bit Access and Handling ......................................................................................91
7.18.1 E1 Sa/Si Bit Reception and Codewords ................................................................91
7.18.2 E1 Sa/Si Transmission and Codewords ................................................................92
Fractional E1 Mode.............................................................................................................92
Unframed Mode ...........................................................................................................................93
Signaling ......................................................................................................................................94
9.1
9.2
Signaling Overview .............................................................................................................94
Channel-Associated Signaling............................................................................................94
9.2.1 T1 Channel-Associated (Robbed-Bit) Signaling ....................................................94
9.2.2 T1 Channel-Associated Signaling: Per Time-Slot Enable......................................96
9.2.3 E1 Channel-Associated Signaling: Time Slot 16 ...................................................96
9.2.4 E1 Channel-Associated Signaling: Per Time-Slot Enable .....................................97
Common Channel Signaling ...............................................................................................97
Signaling Access ................................................................................................................97
Signaling Processing Options .............................................................................................98
9.5.1 Signaling Freeze ....................................................................................................98
9.5.2 Signaling Debounce...............................................................................................99
Alarm Detection and Reporting.........................................................................................100
Alarm Integration ..............................................................................................................100
Alarm Handling and Consequent Actions .........................................................................101
Page 5
9.3
9.4
9.5
10.0 Alarm Processing ......................................................................................................................100
10.1
10.2
10.3
Cortina Systems
®
IXF3204 Quad T1/E1/J1 Framer
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