STE45NK80ZD
N-channel 800V - 0.11Ω - 45A ISOTOP
SuperFREDmesh™ MOSFET
General features
Type
STE45NK80ZD
■
■
■
■
V
DSS
800V
R
DS(on)
<0.13Ω
I
D
45A
Pw
600W
Extremely high dv/dt capability
100% avalanche tested
Very low intrinsic capacitances
Very good manufacturing repeatibility
ISOTOP
Description
The SuperFREDMesh™ series is obtained
through an extreme optimization of ST’s well
established strip-based PowerMESH™ layout. In
addition to pushing on-resistance significantly
down, special care is taken to ensure a very good
dv/dt capability for the most demanding
applications. Such series complements ST full
range of high voltage MOSFETs including
revolutionary MDmesh™ products.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
STE45NK80ZD
Marking
E45NK80ZD
Package
ISOTOP
Packaging
Tube
June 2006
Rev 7
1/13
www.st.com
13
Contents
STE45NK80ZD
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Electrical characteristics (curves)
............................ 7
3
4
5
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/13
STE45NK80ZD
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM (1)
P
TOT
P
TOT
dv/dt
(2)
V
ISO
T
j
Tstg
Absolute maximum ratings
Parameter
Drain-source voltage (V
GS
= 0)
Drain-gate voltage (R
GS
= 20 kW)
Gate- source voltage
Drain Current (continuous) at T
C
= 25°C
(Steady State)
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C (steady state)
Derating factor
Value
800
800
± 30
45
28
180
600
5
7
8
2500
- 65 to 150
Unit
V
V
V
A
A
A
A
W
W/°C
KV
V/ns
V
°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5kW)
Peak diode recovery voltage slope
Insulation withstand voltage (AC-RMS) from all
four terminals to external heatsink
Operating junction temperature
Storage temperature
1. Pulse width limited by safe operating area
2. I
SD
≤
45A, di/dt £ 500 A/µs, V
DD
≤
V
(BR)DSS
.
Table 2.
Rthj-amb
Thermal data
0.2
40
°C/W
°C/W
Thermal Resistance Junction-ambient Max
Rthj-case Thermal Resistance Junction-case Max
Table 3.
Symbol
I
AR
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by T
j
max)
Single pulse avalanche energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 35 V)
Value
45
1.2
Unit
A
J
3/13
Electrical characteristics
STE45NK80ZD
2
Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 4.
Symbol
V
(BR)DSS
On/off states
Parameter
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
Test conditions
I
D
= 1 mA, V
GS
= 0
V
DS
= Max Rating
V
DS
= Max Rating,
T
C
= 125 °C
V
GS
= ± 20V
V
DS
= V
GS
, I
D
= 150µA
V
GS
= 10V, I
D
= 22.5 A
2.5
3.75
0.11
Min.
800
10
100
±10
4.5
0.13
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 5.
Symbol
g
fs (1)
C
iss
C
oss
C
rss
C
oss eq. (2)
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Dynamic
Parameter
Forward
transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
V
DS
= 15V
,
I
D
= 22.5 A
Min.
Typ.
35
26000
1620
260
700
105
128
350
174
558
121
307
781
Max.
Unit
S
pF
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
DS
= 25V, f = 1 MHz,
V
GS
= 0
V
GS
= 0V, V
DS
= 0V to
720V
V
DD
= 400 V, I
D
= 20 A
R
G
= 4.7Ω ,V
GS
= 10 V
(see
Figure 18)
V
DD
= 400 V, I
D
= 40 A,
V
GS
= 10V
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when V
DS
increases from 0 to 80% V
DSS
.
4/13
STE45NK80ZD
Electrical characteristics
Table 6.
Symbol
I
SD
I
SDM
(1)
Source drain diode
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
I
SD
= 45 A, V
GS
= 0
375
4.65
24.8
568
9.66
34
Test conditions
Min.
Typ.
Max.
45
180
1.6
Unit
A
A
V
ns
µC
A
ns
µC
A
V
SD (2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Reverse recovery time
I = 40 A, di/dt = 100A/µs
Reverse recovery charge
SD
V
DD
= 50 V, T
j
= 25°C
Reverse recovery current
Reverse recovery time
I = 40 A, di/dt = 100A/µs
Reverse recovery charge
SD
V
DD
= 50 V, T
j
= 150°C
Reverse recovery current
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
Table 7.
Symbol
BV
GSO
Gate-source zener diode
Parameter
Test Conditions
Min.
30
Typ.
Max.
Unit
V
Gate-source breakdown Igs=± 1mA
voltage
(open drain)
2.1
Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
5/13
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