EP1S60B956C7ES datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Programmable logic devices> Programmable logic> EP1S60B956C7ES

EP1S60B956C7ES: DescriptionField Programmable Gate Array, CMOS, PBGA956, 40 X 40 MM, 1.27 MM PITCH, BGA-956; CategoryProgrammable logic devices Programmable logic; File Size3MB，276 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

Download Datasheet Parametric View All

EP1S60B956C7ES Overview

Field Programmable Gate Array, CMOS, PBGA956, 40 X 40 MM, 1.27 MM PITCH, BGA-956

EP1S60B956C7ES Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	BGA,
Reach Compliance Code	compliant
JESD-30 code	S-PBGA-B956
JESD-609 code	e0
Number of terminals	956
Maximum operating temperature	85 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum supply voltage	1.575 V
Minimum supply voltage	1.425 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

Preview

Download Datasheet

View All

Section I. Stratix Device

Family Data Sheet

This section provides the data sheet specifications for Stratix

devices.

They contain feature definitions of the internal architecture,

configuration and JTAG boundary-scan testing information, DC

operating conditions, AC timing parameters, a reference to power

consumption, and ordering information for Stratix devices.

This section contains the following chapters:

■

Chapter 1, Introduction

Chapter 2, Stratix Architecture

Chapter 3, Configuration & Testing

Chapter 4, DC & Switching Characteristics

Chapter 5, Reference & Ordering Information

Revision History

Chapter

The table below shows the revision history for

Chapters 1

through

Date/Version

July 2005, v3.2

September 2004, v3.1

April 2004, v3.0

●

Changes Made

Minor content changes.

Updated

Table 1–6 on page 1–5.

Main section page numbers changed on first page.

Changed PCI-X to PCI-X 1.0 in

“Features” on page 1–2.

Global change from SignalTap to SignalTap II.

The DSP blocks in

“Features” on page 1–2

provide dedicated

implementation of multipliers that are now “faster than 300 MHz.”

Updated -5 speed grade device information in Table 1-6.

Add -8 speed grade device information.

Format changes throughout chapter.

January 2004, v2.2

October 2003, v2.1

July 2003, v2.0

●

Altera Corporation

Section I–1

Recommended Resources

Dual audio decoding electronic circuit

TDA2822D power amplifier circuit diagram

Q table additional device circuit

Multi-level display water level control circuit

845ddr computer motherboard circuit diagram_05

Computer motherboard circuit diagram 430TX_01

EEWORLD University Hall----POS Printer/Printer Special: POS Printer/Printer Special : https://training.eeworld.com.cn/course/5687...; hi5 MCU

High-performance C6000 DSP architecture: 8 parallel functional units, 2 sets of registers, separate program and data storage; 256-bit instruction fetch package, which can fetch 8 32-bit instructions at a time; 2-way 64-bit data load/store. A...; Aguilera Microcontroller MCU

How to share the University Hall video to Moments: Select the Share buttonSelect the WeChat iconOpen WeChat on your phone and scanEnter the play page on your phone and click "..." in the upper right cornerSelect "Share to Moments"...; EE大学堂 Training Edition

Five solutions to long branch lines in CAN networks: When the CAN bus network is used in practice, temporary testing is occasionally required. At this time, some engineers will directly connect the test node to the bus through a long branch line, which ...; MamoYU Integrated technical exchanges

[Raspberry Pi Pico Review] C/C++ Development Environment Construction: In addition to supporting MicroPython development environment, Raspberry Pi Pico also supports C/C++ development environment. According to the official document getting-started-with-pico, I have never...; dql2016 Innovation Lab

If the stmTX and RX pins of stm32 are broken, will stm32 still work?: Can breaking the TX and RX pins of stm32 increase the difficulty of cracking the program? ? I really want to encrypt the program. Can you give me some guidance? Thank you!...; dys433 stm32/stm8

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components