Field Programmable Gate Array, 144 CLBs, 5000 Gates, CMOS, PQCC84
Parameter Name | Attribute value |
package instruction | , |
Reach Compliance Code | unknown |
Other features | MAX 64 I/OS; 576 FLIP-FLOPS; TYP GATES = 5000 TO 6200 |
Combined latency of CLB-Max | 3.7 ns |
JESD-30 code | S-PQCC-J84 |
Configurable number of logic blocks | 144 |
Equivalent number of gates | 5000 |
Number of terminals | 84 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
organize | 144 CLBS, 5000 GATES |
Package body material | PLASTIC/EPOXY |
Package shape | SQUARE |
Package form | CHIP CARRIER |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum supply voltage | 5.5 V |
Minimum supply voltage | 4.5 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal form | J BEND |
Terminal location | QUAD |
Base Number Matches | 1 |