19-3447; Rev 0; 10/04
KIT
ATION
EVALU
BLE
AVAILA
14-Bit, 95Msps, 3.3V ADC
General Description
Features
♦
Direct IF Sampling Up to 400MHz
♦
Excellent Dynamic Performance
74.2dB/72.1dB SNR at f
IN
= 3MHz/175MHz
88.4dBc/74.7dBc SFDR at f
IN
= 3MHz/175MHz
♦
Low Noise Floor: 74.7dBFS
♦
3.3V Low-Power Operation
465mW (Single-Ended Clock Mode)
497mW (Differential Clock Mode)
300µW (Power-Down Mode)
♦
Fully Differential or Single-Ended Analog Input
♦
Adjustable Full-Scale Analog Input Range
±0.35V to ±1.10V
♦
Common-Mode Reference
♦
CMOS-Compatible Outputs in Two’s Complement
or Gray Code
♦
Data-Valid Indicator Simplifies Digital Interface
♦
Data Out-of-Range Indicator
♦
Miniature, 6mm x 6mm x 0.8mm 40-Pin Thin QFN
Package with Exposed Paddle
♦
Evaluation Kit Available (Order MAX12555EVKIT)
MAX12555
The MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital
converter (ADC) featuring a fully differential wideband
track-and-hold (T/H) input amplifier, driving a low-noise
internal quantizer. The analog input stage accepts single-
ended or differential signals. The MAX12555 is optimized
for high dynamic performance, low power, and small
size. Excellent dynamic performance is maintained from
baseband to input frequencies of 175MHz and beyond,
making the MAX12555 ideal for intermediate-
frequency (IF) sampling applications.
Powered from a single 3.3V supply, the MAX12555 con-
sumes only 497mW while delivering a typical 72.1dB
signal-to-noise ratio (SNR) performance at a 175MHz
input frequency. In addition to low operating power, the
MAX12555 features a 300µW power-down mode to
conserve power during idle periods.
A flexible reference structure allows the MAX12555 to use
the internal 2.048V bandgap reference or accept an
externally applied reference. The reference structure
allows the full-scale analog input range to be adjusted
from ±0.35V to ±1.10V. The MAX12555 provides a com-
mon-mode reference to simplify design and reduce exter-
nal component count in differential analog input circuits.
The MAX12555 supports either a single-ended or differ-
ential input clock. Wide variations in the clock duty
cycle are compensated with the ADC’s internal duty-
cycle equalizer (DCE).
ADC conversion results are available through a 14-bit,
parallel, CMOS-compatible output bus. The digital out-
put format is pin selectable to be either two’s comple-
ment or Gray code. A data-valid indicator eliminates
external components that are normally required for reli-
able digital interfacing. A separate digital power input
accepts a wide 1.7V to 3.6V supply, allowing the
MAX12555 to interface with various logic levels.
The MAX12555 is available in a 6mm x 6mm x 0.8mm,
40-pin thin QFN package with exposed paddle (EP),
and is specified for the extended industrial (-40°C to
+85°C) temperature range.
See the
Pin-Compatible Versions
table for a complete
family of 14-bit and 12-bit high-speed ADCs.
Ordering Information
PART*
MAX12555ETL
MAX12555ETL+
PIN-PACKAGE
40 Thin QFN
40 Thin QFN
PKG CODE
T4066-3
T4066-3
+Denotes
lead-free package.
*All
devices specified over the -40°C to +85°C operating range.
Pin-Compatible Versions
PART
MAX12555
MAX12554
MAX12553
MAX19538
MAX1209
MAX1211
MAX1208
MAX1207
MAX1206
SAMPLING
RATE
(Msps)
95
80
65
95
80
65
80
65
40
RESOLUTION
(BITS)
14
14
14
12
12
12
12
12
12
TARGET
APPLICATION
IF/Baseband
IF/Baseband
IF/Baseband
IF/Baseband
IF
IF
Baseband
Baseband
Baseband
Applications
IF and Baseband Communication Receivers
Cellular, Point-to-Point Microwave, HFC, WLAN
Medical Imaging Including Positron Emission
Tomography (PET)
Video Imaging
Portable Instrumentation
Low-Power Data Acquisition
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
14-Bit, 95Msps, 3.3V ADC
MAX12555
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND ...........................................................-0.3V to +3.6V
OV
DD
to GND........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
INP, INN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T, DCE,
PD to GND ........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
D13–D0, DAV, DOR to GND....................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C)........................2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T
= low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
DC ACCURACY
(Note 2)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
ANALOG INPUT (INP, INN)
Differential Input Voltage Range
Common-Mode Input Voltage
Input Capacitance
(Figure 3)
CONVERSION RATE
Maximum Clock Frequency
Minimum Clock Frequency
Data Latency
Figure 6
8.0
f
CLK
95
5
MHz
MHz
Clock
cycles
dBFS
C
PAR
C
SAMPLE
Fixed capacitance to ground
Switched capacitance
V
DIFF
Differential or single-ended inputs
±1.024
V
DD
/ 2
2
4.5
V
V
pF
INL
DNL
f
IN
= 3MHz
f
IN
= 3MHz
V
REFIN
= 2.048V
V
REFIN
= 2.048V
14
±1.6
±0.65
±0.1
±0.35
±0.78
±5.3
Bits
LSB
LSB
%FS
%FS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC CHARACTERISTICS (Differential Inputs)
(Note 2)
Small-Signal Noise Floor
SSNF
Input at less than -35dBFS
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
Signal-to-Noise Ratio
SNR
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
Signal-to-Noise and Distortion
SINAD
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
64.0
66.9
66.7
67.6
-74.7
74.2
73.8
73.6
72.1
73.8
73.5
72.5
69.8
dB
dB
2
_______________________________________________________________________________________
14-Bit, 95Msps, 3.3V ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
Spurious-Free Dynamic Range
SFDR
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
f
IN
= 3MHz at -0.5dBFS
Total Harmonic Distortion
THD
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS
f
IN
= 3MHz at -0.5dBFS
Second Harmonic
HD2
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS
f
IN
= 3MHz at -0.5dBFS
Third Harmonic
HD3
f
IN
= 47.5MHz at -0.5dBFS
f
IN
= 70MHz at -0.5dBFS
f
IN
= 175MHz at -0.5dBFS
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
Two-Tone Spurious-Free
Dynamic Range
Aperture Delay
Aperture Jitter
Output Noise
Overdrive Recovery Time
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
Figure 4
Figure 4
INP = INN = COM
±10% beyond full scale
67.1
MIN
73.5
TYP
88.4
86.9
80.5
74.7
-85.1
-84.7
-79.0
-73.6
-89
-92
-91
-82
-92
-93
-81
-75
-79
dBc
-75
-80
dBc
-76
80
dBc
76
1.2
<0.2
1.07
1
ns
ps
RMS
LSB
RMS
Clock
cycles
dBc
dBc
-66.1
-72.8
dBc
dBc
MAX
UNITS
MAX12555
Intermodulation Distortion
IMD
Third-Order Intermodulation
IM3
SFDR
TT
t
AD
t
AJ
n
OUT
_______________________________________________________________________________________
3
14-Bit, 95Msps, 3.3V ADC
MAX12555
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
REFOUT Output Voltage
COM Output Voltage
Differential-Reference Output
Voltage
REFOUT Load Regulation
REFOUT Temperature Coefficient
REFOUT Short-Circuit Current
TC
REF
Short to V
DD
—sinking
Short to GND—sourcing
V
REFIN
V
REFP
V
REFN
V
COM
V
REF
(V
DD
/ 2) + (V
REFIN
x 3/8)
(V
DD
/ 2) - (V
REFIN
x 3/8)
V
DD
/ 2
V
REF
= V
REFP
- V
REN
= V
REFIN
x 3/4
1.60
1.454
±25
>50
V
COM
V
DD
/ 2
V
REFP
- V
COM
V
REFN
- V
COM
V
REF
I
REFP
I
REFN
I
COM
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
V
REFP
= 2.418V
V
REFN
= 0.882V
V
COM
= 1.650V
1.65
0.768
-0.768
1.536
1.4
1.0
1.0
13
6
0.8 x
V
DD
0.2 x
V
DD
0.2
SYMBOL
V
REFOUT
V
COM
V
REF
V
DD
/ 2
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
-1.0mA < I
REFOUT
< +0.1mA
CONDITIONS
MIN
1.980
TYP
2.048
1.65
1.536
35
+50
0.24
2.1
2.048
2.418
0.882
1.65
1.70
1.604
MAX
2.066
UNITS
V
V
V
mV/mA
ppm/°C
mA
INTERNAL REFERENCE (REFIN = REFOUT; V
REFP
, V
REFN
, and V
COM
are generated internally)
BUFFERED EXTERNAL REFERENCE (REFIN driven externally; V
REFIN
= 2.048V, V
REFP
, V
REFN
, and V
COM
are generated internally)
REFIN Input Voltage
REFP Output Voltage
REFN Output Voltage
COM Output Voltage
Differential-Reference Output
Voltage
Differential-Reference
Temperature Coefficient
REFIN Input Resistance
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND; V
REFP
, V
REFN
, and V
COM
are applied externally)
COM Input Voltage
REFP Input Voltage
REFN Input Voltage
Differential-Reference Input
Voltage
REFP Sink Current
REFN Source Current
COM Sink Current
REFP, REFN Capacitance
COM Capacitance
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
Single-Ended Input Low
Threshold
Minimum Differential Input
Voltage Swing
V
IH
V
IL
CLKTYP = GND, CLKN = GND
CLKTYP = GND, CLKN = GND
CLKTYP = high
V
V
V
P-P
V
V
V
V
mA
mA
mA
pF
pF
V
V
V
V
V
ppm/°C
MΩ
4
_______________________________________________________________________________________
14-Bit, 95Msps, 3.3V ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
Differential Input Common-Mode
Voltage
Input Resistance
Input Capacitance
R
CLK
C
CLK
0.8 x
OV
DD
0.2 x
OV
DD
V
IH
= OV
DD
V
IL
= 0
C
DIN
D13–D0, DOR, I
SINK
= 200µA
DAV, I
SINK
= 600µA
D13–D0, DOR, I
SOURCE
= 200µA
Output-Voltage High
V
OH
DAV, I
SOURCE
= 600µA
Tri-State Leakage Current
D13–D0, DOR Tri-State Output
Capacitance
DAV Tri-State Output
Capacitance
POWER REQUIREMENTS
Analog Supply Voltage
Digital Output Supply Voltage
V
DD
OV
DD
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS, CLKTYP = GND,
single-ended clock
Analog Supply Current
I
VDD
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD,
differential clock
Power-down mode clock idle, PD = OV
DD
3.15
1.7
3.3
1.8
3.60
V
DD
+
0.3V
V
V
I
LEAK
C
OUT
C
DAV
(Note 5)
(Note 5)
(Note 5)
3
6
OV
DD
-
0.2
V
OV
DD
-
0.2
±5
µA
pF
pF
5
0.2
0.2
±5
±5
SYMBOL
CONDITIONS
CLKTYP = high
Figure 5
MIN
TYP
V
DD
/ 2
5
2
MAX
UNITS
V
kΩ
pF
MAX12555
DIGITAL INPUTS (CLKTYP, DCE, G/T, PD)
Input High Threshold
Input Low Threshold
Input Leakage Current
Input Capacitance
V
IH
V
IL
V
V
µA
pF
DIGITAL OUTPUTS (D13–D0, DAV, DOR)
Output-Voltage Low
V
OL
V
141
mA
150.6
0.1
165
_______________________________________________________________________________________
5
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