impedance matched, single-stage, push-pull Class AB amplifier mod-
ule suitable for use as a power amplifier driver or output stage. The
power transistors are fabricated using Sirenza's latest, high perfor-
mance LDMOS process. It is a drop-in, no-tune solution for high power
applications requiring high efficiency, excellent linearity, and unit-to-
unit repeatability. It is internally matched to 50 ohms.
SDM-09120-1Y
915-960 MHz Class AB
130W Power Amplifier
Functional Block Diagram
+3V DC to +5 V DC
1
+28V DC
Vgs
Vds
1
180
Gnd
Balun
RF
in
Balun
RF
out
o
0
o
Gnd
Product Features
Gnd
0
o
Gnd
180
o
Vgs
2
+3V DC to +5 V DC
+28V DC
Vds
2
•
•
•
•
•
•
•
50
W
RF impedance
130W Output P
1dB
Single Supply Operation : Nominally 28V
High Gain: 15 dB at 942 MHz
High Efficiency: 42% at 942 MHz
ESD Protection: JEDEC Class 2 (2000V HBM)
RoHS Compliant Green Package
Case Flange = Ground
Applications
Key Specifications
Symbol
Frequency
P
1dB
Gain
Gain Flatness
IRL
IMD
IMD Variation
Efficiency
Delay
Parameter
Frequency of Operation
Output Power at 1dB Compression, 943 MHz
120W PEP Output Power, 942MHz and 943MHz
•
•
•
•
Base Station PA driver
Repeater
CDMA
GSM / EDGE
Units
MHz
W
dB
dB
dB
dBc
dB
%
%
nS
Deg
Min.
915
120
14
-
-
-
-
32
-
-
-
Typ.
-
130
15
0.3
-14
-28
1.0
33
42
4.0
0.7
Max.
960
-
-
0.5
-12
-26
-
-
-
-
-
Peak-to-Peak Gain Variation, 120W PEP, 925 - 960MHz
Input Return Loss, 120W PEP Output Power, 925 - 960MHz
3rd Order Product. 120W PEP Output, 942MHz and 943MHz
120W PEP Output, Change in Spacing 100KHz - 25MHz
Drain Efficiency, 120W PEP Output, 942MHz and 943MHz
Drain Efficiency, 120W CW Output, 943MHz
Signal Delay from Pin 3 to Pin 8
Phase Linearity
Deviation from Linear Phase (Peak-to-Peak)
T
Test Conditions Z
in
= Z
out
= 50Ω, V
DD
= 28.0V, I
DQ1
= I
DQ2
=500mA T
Flange
= 25ºC
Quality Specifications
Parameter
ESD Rating
MTTF
Description
Human Body Model
200 C Channel
o
Unit
Volts
Hours
Typical
2000
1.2 X 10
6
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such
information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices
does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2005 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court,
Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-105407 Rev C
SDM-09120-1Y
915-960 MHz 130W Power Amp Module
Pin Description
Pin #
1
2,4,7,9
3
5
6
8
10
Flange
Function
V
GS1
Ground
RF Input
V
GS2
V
D2
RF Output
V
D1
Ground
Description
LDMOS FET Q1 and Q2 gate bias. V
GSTH
3.0 to 5.0 VDC. See Notes 2, 3 and 4
Module Topside ground.
Internally DC blocked
LDMOS FET Q3 and Q4 gate bias. V
GSTH
3.0 to 5.0 VDC. See Notes 2, 3 and 4
LDMOS FET Q3 and Q4 drain bias. See Note 1.
Internally DC blocked
LDMOS FET Q1 and Q2 drain bias. See Note 1.
Baseplate provides electrical ground and a thermal transfer path for the device. Proper mounting assures
optimal performance and the highest reliability. See Sirenza applications note AN-054 Detailed Installation Instructions for
Power Modules.
Simplified Device Schematic
Q1
1
2
+3V DC to +6 V DC
+28V DC
10
9
Q2
180
o
Note 1:
Internal RF decoupling is included on all bias leads. No addi-
tional bypass elements are required, however some applica-
tions may require energy storage on the V
D
leads to
accommodate modulated signals.
Note 2:
Gate voltage must be applied to V
GS
leads simultaneously with
or after application of drain voltage to prevent potentially
destructive oscillations. Bias voltages should never be applied
to a module unless it is properly terminated on both input and
output.
Note 3:
The required V
GS
corresponding to a specific I
DQ
will vary from
module to module and may differ between V
GS1
and V
GS2
on
the same module by as much as ±0.10 volts due to the normal
die-to-die variation in threshold voltage for LDMOS transistors.
Unit
V
dBm
VSWR
V
ºC
ºC
ºC
Note 4:
The threshold voltage (V
GSTH
) of LDMOS transistors varies with
device temperature. External temperature compensation may
be required. See Sirenza application notes AN-067 LDMOS
Bias Temperature Compensation.
Note 5:
This module was designed to have it's leads hand
soldered to an adjacent PCB. The maximum soldering iron tip
temperature should not exceed 700° F, and the soldering iron
tip should not be in direct contact with the lead for longer than
10 seconds. Refer to app note AN054 (www.sirenza.com) for
further installation instructions.
0
o
3
Balun
Balun
8
Q3
0
o
180
o
4
Q4
+28V DC
7
+3V DC to +6 V DC
5
6
Absolute Maximum Ratings
Parameters
Drain Voltage (V
DD
)
RF Input Power
Load Impedance for Continuous Operation
Without Damage
Control (Gate) Voltage, VDD = 0 VDC
Output Device Channel Temperature
Operating Temperature Range
Storage Temperature Range
Value
35
+43
5:1
15
+200
-20 to
+90
-40 to
+100
Operation of this device beyond any one of these limits may cause per-
manent damage. For reliable continuous operation see typical setup val-
ues specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-105407 Rev C
SDM-09120-1Y
915-960 MHz 130W Power Amp Module
Typical Performance Curves
2 Tone Gain, Efficiency, Linearity and IRL vs Frequency
Vdd=28V, Idq=1.2A, Pout=120W PEP, Delta F=1 MHz
55
50
Gain (dB), Efficiency (%)
45
40
35
30
25
20
15
10
5
900
920
940
Frequency (MHz)
960
Gain
IM3
IM7
Efficiency
IM5
IRL
0
-5
-10
IMD(dBc), IRL (dB)
-15
-20
-25
-30
-35
-40
-45
-50
980
Gain (dB), Efficiency (%)
45
40
35
30
25
20
15
10
5
0
0
25
50
2 Tone Gain, Efficiency, Linearity vs Pout
Vdd=28V, Idq=1.2A, Freq=942 MHz, Delta F=1 MHz
-25
-30
-35
-40
-45
-50
-55
-60
IMD (dBc)
Gain
IM3
IM7
75
Pout (W PEP)
Efficiency
IM5
100
125
-65
-70
150
CW Gain, Efficiency, IRL vs Frequency
Vdd=28V, Idq=1.2A, Pout=120W
60
0
20
19
CW Gain, Efficiency vs Pout
Vdd=28V, Idq=1.2A, Freq=942 MHz
60
55
50
45
40
35
30
25
Efficiency (%)
50
Gain (dB), Efficiency (%)
-5
Input Return Loss (dB)
18
17
40
Gain
Efficiency
IRL
-10
16
Gain (dB)
15
14
13
12
11
30
-15
20
-20
Gain
Efficiency
20
15
10
5
0
150
10
-25
10
9
0
900
920
940
960
980
-30
1000
8
0
25
50
75
Pout (W)
100
125
Frequency (MHz)
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
3
http://www.sirenza.com
EDS-105407 Rev C
SDM-09120-1Y
915-960 MHz 130W Power Amp Module
Typical Performance Curves (cont’d)
CW Gain, Efficiency, IRL vs Supply Voltage
Pout=120W, Idq=1.2A, Freq=942 MHz
Two Tone Gain, Efficiency, IRL, IMD vs Supply Voltage
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