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EP630LC-15

Description
OT PLD, 17ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28
CategoryProgrammable logic devices    Programmable logic   
File Size125KB,4 Pages
ManufacturerAltera (Intel)
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EP630LC-15 Overview

OT PLD, 17ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28

EP630LC-15 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeQLCC
package instructionQCCJ, LDCC28,.5SQ
Contacts28
Reach Compliance Codecompliant
Other featuresMACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS
ArchitecturePAL-TYPE
maximum clock frequency71.4 MHz
JESD-30 codeS-PQCC-J28
JESD-609 codee0
length11.5062 mm
Dedicated input times4
Number of I/O lines16
Number of entries20
Output times16
Number of product terms160
Number of terminals28
Maximum operating temperature70 °C
Minimum operating temperature
organize4 DEDICATED INPUTS, 16 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC28,.5SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)220
power supply5 V
Programmable logic typeOT PLD
propagation delay17 ns
Certification statusNot Qualified
Maximum seat height4.572 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.5062 mm
Base Number Matches1

EP630LC-15 Related Products

EP630LC-15 EP630LC-20 EP630LI-20 EP630PC-15 EP630PC-20 EP630PI-20 EP630SC-15 EP630SC-20 EP630SI-20
Description OT PLD, 17ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28 OT PLD, 22ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28 OT PLD, 22ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28 OT PLD, 17ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 OT PLD, 22ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 OT PLD, 22ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 OT PLD, 17ns, PAL-Type, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24 OT PLD, 22ns, PAL-Type, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24 OT PLD, 22ns, PAL-Type, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code QLCC QLCC QLCC DIP DIP DIP SOIC SOIC SOIC
package instruction QCCJ, LDCC28,.5SQ QCCJ, LDCC28,.5SQ QCCJ, LDCC28,.5SQ DIP, DIP24,.3 DIP, DIP24,.3 DIP, DIP24,.3 SOP, SOP24,.4 SOP, SOP24,.4 SOP, SOP24,.4
Contacts 28 28 28 24 24 24 24 24 24
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compliant
Other features MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE
maximum clock frequency 71.4 MHz 55.5 MHz 55.5 MHz 71.4 MHz 55.5 MHz 55.5 MHz 71.4 MHz 55.5 MHz 55.5 MHz
JESD-30 code S-PQCC-J28 S-PQCC-J28 S-PQCC-J28 R-PDIP-T24 R-PDIP-T24 R-PDIP-T24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0
length 11.5062 mm 11.5062 mm 11.5062 mm 31.6865 mm 31.6865 mm 31.6865 mm 15.4 mm 15.4 mm 15.4 mm
Dedicated input times 4 4 4 4 4 4 4 4 4
Number of I/O lines 16 16 16 16 16 16 16 16 16
Number of entries 20 20 20 20 20 20 20 20 20
Output times 16 16 16 16 16 16 16 16 16
Number of product terms 160 160 160 160 160 160 160 160 160
Number of terminals 28 28 28 24 24 24 24 24 24
Maximum operating temperature 70 °C 70 °C 85 °C 70 °C 70 °C 85 °C 70 °C 70 °C 85 °C
organize 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O 4 DEDICATED INPUTS, 16 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ QCCJ DIP DIP DIP SOP SOP SOP
Encapsulate equivalent code LDCC28,.5SQ LDCC28,.5SQ LDCC28,.5SQ DIP24,.3 DIP24,.3 DIP24,.3 SOP24,.4 SOP24,.4 SOP24,.4
Package shape SQUARE SQUARE SQUARE RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form CHIP CARRIER CHIP CARRIER CHIP CARRIER IN-LINE IN-LINE IN-LINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 220 220 220 NOT SPECIFIED NOT SPECIFIED 220 220 220 220
power supply 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Programmable logic type OT PLD OT PLD OT PLD OT PLD OT PLD OT PLD OT PLD OT PLD OT PLD
propagation delay 17 ns 22 ns 22 ns 17 ns 22 ns 22 ns 17 ns 22 ns 22 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 4.572 mm 4.572 mm 4.572 mm 4.318 mm 4.318 mm 4.318 mm 2.65 mm 2.65 mm 2.65 mm
Maximum supply voltage 5.25 V 5.25 V 5.5 V 5.25 V 5.25 V 5.5 V 5.25 V 5.25 V 5.5 V
Minimum supply voltage 4.75 V 4.75 V 4.5 V 4.75 V 4.75 V 4.5 V 4.75 V 4.75 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES NO NO NO YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form J BEND J BEND J BEND THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 2.54 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location QUAD QUAD QUAD DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 11.5062 mm 11.5062 mm 11.5062 mm 7.62 mm 7.62 mm 7.62 mm 7.5 mm 7.5 mm 7.5 mm
Base Number Matches 1 1 1 1 1 1 1 1 1
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