NM93CS56LZEM8X datasheet, PDF - EEWORLD Datasheet

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NM93CS56LZEM8X: DescriptionEEPROM, 128X16, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8; Categorystorage storage; File Size164KB，16 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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NM93CS56LZEM8X Overview

EEPROM, 128X16, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8

NM93CS56LZEM8X Parametric

Parameter Name	Attribute value
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	unknown
ECCN code	EAR99
Is Samacsys	N
Other features	DATA RETENTION=40 YEARS
Maximum clock frequency (fCLK)	0.25 MHz
Data retention time - minimum	40
JESD-30 code	R-PDSO-G8
length	4.9 mm
memory density	2048 bit
Memory IC Type	EEPROM
memory width	16
Number of functions	1
Number of terminals	8
word count	128 words
character code	128
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128X16
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Certification status	Not Qualified
Maximum seat height	1.75 mm
Serial bus type	MICROWIRE
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
Maximum write cycle time (tWC)	15 ms
Base Number Matches	1

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NM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM

with Data Protect and Sequential Read

February 2000

NM93CS56

(MICROWIRE™ Bus Interface) 2048-Bit Serial EEPROM

with Data Protect and Sequential Read

General Description

NM93CS56 is a 2048-bit CMOS non-volatile EEPROM organized

as 128 x 16-bit array. This device features MICROWIRE interface

which is a 4-wire serial bus with chipselect (CS), clock (SK), data

input (DI) and data output (DO) signals. This interface is compat-

ible to many of standard Microcontrollers and Microprocessors.

NM93CS56 offers programmable write protection to the memory

array using a special register called Protect Register. Selected

memory locations can be protected against write by programming

this Protect Register with the address of the first memory location

to be protected (all locations greater than or equal to this first

address are then protected from further change). Additionally, this

address can be “permanently locked” into the device, making all

future attempts to change data impossible. In addition this device

features “sequential read”, by which, entire memory can be read

in one cycle instead of multiple single byte read cycles. There are

10 instructions implemented on the NM93CS56, 5 of which are for

memory operations and the remaining 5 are for Protect Register

operations. This device is fabricated using Fairchild Semiconduc-

tor floating-gate CMOS process for high reliability, high endurance

and low power consumption.

“LZ” and “L” versions of NM93CS56 offer very low standby current

making them suitable for low power applications. This device is offered

in both SO and TSSOP packages for small space considerations.

Features

Wide V

2.7V - 5.5V

Programmable write protection

Sequential register read

Typical active current of 200µA

10µA standby current typical

1µA standby current typical (L)

0.1µA standby current typical (LZ)

No Erase instruction required before Write instruction

Self timed write cycle

Device status during programming cycles

40 year data retention

Endurance: 1,000,000 data changes

Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP

Functional Diagram

INSTRUCTION

DECODER

CONTROL LOGIC

AND CLOCK

GENERATORS

PRE

ADDRESS

PROTECT

COMPARATOR

AND

WRITE ENABLE

HIGH VOLTAGE

GENERATOR

AND

PROGRAM

TIMER

DECODER

EEPROM ARRAY

READ/WRITE AMPS

DATA IN/OUT REGISTER

16 BITS

DATA OUT BUFFER

NM93CS56 Rev. F.2

www.fairchildsemi.com

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