MC88921DW datasheet, PDF - EEWORLD Datasheet

MC88921DW: DescriptionPLL Based Clock Driver, 88921 Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20; Categorylogic logic; File Size544KB，11 Pages; ManufacturerIDT (Integrated Device Technology)

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MC88921DW Overview

PLL Based Clock Driver, 88921 Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20

Parameter Name	Attribute value
Parts packaging code	SOIC
package instruction	SOP,
Contacts	20
Reach Compliance Code	unknown
Is Samacsys	N
series	88921
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G20
length	12.8 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	20
Actual output times	5
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
propagation delay (tpd)	13.5 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	1 ns
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.5 mm
minfmax	66 MHz
Base Number Matches	1

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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