K6X8008C2B Family
Document Title
1Mx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0
0.1
Initial draft
Revised
- Deleted 44-TSOP2-400R package type.
- Added Commercial product.
Finalized
- Changed I
CC
from 10mA to 6mA
- Changed I
CC
1 from 10mA to 7mA
- Changed I
CC
2 from 50mA to 35mA
- Changed I
SB
from 3mA to 0.4mA
- Changed I
SB
1
(Commercial)
from 40µA to 25µA
- Changed I
SB
1
(industrial)
from 40µA to 25µA
- Changed I
SB
1
(Automotive)
from 50µA to 40µA
- Changed I
DR
(Commercial)
from 30µA to 15µA
- Changed I
DR
(industrial)
from 30µA to 15µA
- Changed I
DR
(Automotive)
from 40µA to 30µA
Draft Date
October 31, 2002
December 11, 2002
Remark
Preliminary
Preliminary
1.0
September 16, 2003 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to yourquestions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 1.0
September 2003
K6X8008C2B Family
1Mx8 bit Low Power full CMOS Static RAM
FEATURES
•
Process Technology: Full CMOS
•
Organization: 1M x8
•
Power Supply Voltage: 4.5~5.5V
•
Low Data Retention Voltage: 2.0V(Min)
•
Three state output and TTL Compatible
•
Package Type: 44-TSOP2-400F
CMOS SRAM
GENERAL DESCRIPTION
The K6X8008C2B families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families sup-
port various operating temperature range for user flexibility of
system design. The families also support low data retention
voltage for battery back-up operation with low data retention
current.
PRO
DUCT FAMILY
Power Dissipation
Product Family
K6X8008C2B-B
K6X8008C2B-F
K6X8008C2B-Q
Operating Temperature
Commercial(0~70°C)
Industrial(-40~85°C)
Automotive(-40~125°C)
4.5~5.5V
55 /70ns
1)
Vcc Range
Speed
Standby
(I
SB1
, Max)
25µA
25µA
40µA
Operating
(I
CC2
, Max)
35mA
PKG Type
44-TSOP2-400F
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
A4
A3
A2
A1
A0
CS1
NC
NC
I/O1
I/O2
Vcc
Vss
I/O3
I/O4
NC
NC
WE
A19
A18
A17
A16
A15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
CS2
A8
NC
NC
I/O8
I/O7
Vss
Vcc
I/O6
I/O5
NC
NC
A9
A10
A11
A12
A13
A14
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
Vcc
Vss
Row
Addresses
Row
select
Memory array
44-TSOP2
Forward
I/O
1
~I/O
8
Data
cont
I/O Circuit
Column select
Data
cont
Column Addresses
Name
CS
1
, CS
2
OE
WE
I/O
1
~I/O
8
Function
Chip Select Inputs
Output Enable Input
Write Enable Input
Data Inputs/Outputs
Name
Vcc
Vss
Function
Power
Ground
CS1
CS2
OE
WE
A
0
~A
19
Address Inputs
NC
No Connect
Control Logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 1.0
September 2003
K6X8008C2B Family
PRODUCT LIST
Commercial Products(0~70°C)
Part Name
K6X8008C2B-TB55
K6X8008C2B-TB70
CMOS SRAM
Industrial Products(-40~85°C)
Part Name
K6X8008C2B-TF55
K6X8008C2B-TF70
Automotive Products(-40~125°C)
Part Name
K6X8008C2B-TQ55
K6X8008C2B-TQ70
Function
44-TSOP2-F, 55ns, LL
44-TSOP2-F, 70ns, LL
Function
44-TSOP2-F, 55ns, LL
44-TSOP2-F, 70ns, LL
Function
44-TSOP2-F, 55ns, L
44-TSOP2-F, 70ns, L
FUNCTIONAL DESCRIPTION
CS
1
H
X
L
L
L
CS
2
X
L
H
H
H
OE
X
X
H
L
X
WE
X
X
H
H
L
I/O
1~8
High-Z
High-Z
High-Z
Dout
Din
Mode
Deselected
Deselected
Output Disabled
Read
Write
Power
Standby
Standby
Active
Active
Active
Note: X means don′t care. (Must be low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Symbol
V
IN
, V
OUT
V
CC
P
D
T
STG
Ratings
-0.5 to V
CC
+0.5V(max.7.0V)
-0.3 to 7.0
1.0
-65 to 150
0 to 70
Operating Temperature
T
A
-40 to 85
-40 to 125
Unit
V
V
W
°C
°C
°C
°C
Remark
-
-
-
-
K6X8008C2B-B
K6X8008C2B-F
K6X8008C2B-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 1.0
September 2003
K6X8008C2B Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
K6X8008C2B Family
All Family
K6X8008C2B Family
K6X8008C2B Family
Min
4.5
0
2.2
-0.5
3)
CMOS SRAM
Typ
5.0
0
-
-
Max
5.5
0
Vcc+0.5
2)
0.8
Unit
V
V
V
V
Note:
1. Commercial Product: T
A
=0 to 70°C, otherwise specified.
Industrial Product: T
A
=-40 to 85°C, otherwise specified.
Automotive Product: T
A
=-40 to 125°C, otherwise specified.
2. Overshoot: V
CC
+3.0V in case of pulse width
≤30ns.
3. Undershoot: -3.0V in case of pulse width
≤30ns.
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested.
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Symbol
I
LI
I
LO
I
CC
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
V
OL
V
OH
I
SB
V
IN
=Vss to Vcc
CS
1
=V
IH,
CS
2
=V
IL
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS
1
=V
IL,
CS
2
=V
IH
, WE=V
IH
, V
IN
=V
IH
or V
IL
Cycle time=1µs, 100%duty, I
IO
=0mA, CS
1
≤0.2V,
CS
2
≥Vcc-0.2V,
V
IN
≤0.2V
or V
IN
≥V
CC
-0.2V
Cycle time=Min, I
IO
=0mA, 100% duty, CS
1
=V
IL
, CS
2
=V
IH,
V
IN
=V
IL
or V
IH
I
OL
= 2.1mA
I
OH
= -1.0mA
CS
1
=V
IH
, CS
2
=V
IL
, Other inputs=V
IH
or V
IL
Other input =0~Vcc,
1) CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V
(CS
1
con-
trolled) or 2) 0V≤CS
2
≤0.2V(CS
2
controlled)
K6X8008C2B-B
K6X8008C2B-F
K6X8008C2B-Q
Test Conditions
Min Typ Max Unit
-1
-1
-
-
-
-
2.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
1
6
7
35
0.4
-
0.4
25
25
40
µA
µA
µA
mA
mA
mA
V
V
mA
Standby Current(CMOS)
I
SB1
4
Revision 1.0
September 2003
K6X8008C2B Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Input/Output Reference)
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
=50pF+1TTL
CMOS SRAM
C
L
1
)
1.Including scope and jig capacitance
AC CHARACTERISTICS
(V
CC
=4.5~5.5V, Commercial product: T
A
=0 to 70°C, Industrial product: T
A
=-40 to 85°C, Automotive product: T
A
=-40 to 125°C)
Speed Bins
Parameter List
Symbol
Min
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Read
Chip Select to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
55
-
-
-
10
5
0
0
10
55
45
0
45
40
0
0
25
0
5
55ns
Max
-
55
55
25
-
-
20
20
-
-
-
-
-
-
-
20
-
-
-
Min
70
-
-
-
10
5
0
0
10
70
60
0
60
50
0
0
30
0
5
70ns
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
20
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Symbol
V
DR
I
DR
Test Condition
CS
1
≥Vcc-0.2V
1)
K6X8008C2B-B
Vcc=3.0V, CS
1
≥Vcc-0.2V
1)
K6X8008C2B-F
K6X8008C2B-Q
Data retention set-up time
Recovery time
t
SDR
t
RDR
See data retention waveform
0
5
-
-
-
-
Min
2.0
Typ
-
Max
5.5
15
15
30
-
-
ms
µA
Unit
V
1. CS
1
≥Vcc-0.2V,CS
2
≥
Vcc-0.2V(CS
1
controlled) or CS
2
≥
Vcc-0.2V(CS
2
controlled).
5
Revision 1.0
September 2003
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