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IS64C6416AL-15KA3

Description
Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, MS-027, SOJ-44
Categorystorage   
File Size87KB,17 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Download Datasheet Parametric View All

IS64C6416AL-15KA3 Overview

Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, MS-027, SOJ-44

IS64C6416AL-15KA3 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeSOJ
package instructionSOJ, SOJ44,.44
Contacts44
Reach Compliance Codecompliant
ECCN code3A991.B.2.B
Is SamacsysN
Maximum access time15 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J44
JESD-609 codee0
length28.575 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals44
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize64KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ44,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Filter levelAEC-Q100
Maximum seat height3.75 mm
Maximum standby current0.000125 A
Minimum standby current2 V
Maximum slew rate0.06 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
Base Number Matches1
IS61C6416AL
IS62C6416AL
IS64C6416AL
IS65C6416AL
ISSI
JANUARY 2005
®
64K x 16 HIGH-SPEED CMOS STATIC RAM
FEATURES
IS61C6416AL and IS64C6416AL
• High-speed access time: 12 ns, 15ns
• Low Active Power: 175 mW (typical)
• Low Standby Power: 1 mW (typical)
CMOS standby
IS62C6416AL and IS65C6416AL
• High-speed access time: 35 ns, 45ns
• Low Active Power: 50 mW (typical)
• Low Standby Power: 100 µW (typical)
CMOS standby
• TTL compatible interface levels
• Single 5V ± 10% power supply
• Fully static operation: no clock or refresh
required
• Available in 44-pin SOJ package and
44-pin TSOP (Type II)
• Commercial, Industrial and Automotive tempera-
ture ranges available
• Lead-free available
DESCRIPTION
The
ISSI
IS61C6416AL, IS62C6416AL, IS64C6416AL and
IS65C6416AL are high-speed, 1,048,576-bit static RAMs
organized as 65,536 words by 16 bits. They are fabricated
using
ISSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design tech-
niques, yields access times as fast as 12 ns with low power
consumption.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE.
The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS61C6416AL, IS62C6416AL, IS64C6416AL and
IS65C6416AL are packaged in the JEDEC standard 44-pin
400-mil SOJ and 44-pin TSOP (Type II).
FUNCTIONAL BLOCK DIAGRAM
A0-A15
DECODER
64K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
01/17/05
1
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