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74VHC112MX

Description
Logic Type: Type JK Additional Features: Differential Output 74VHC Series 5.5 V Dual JK Flip Flop with Preset and Clear - SOIC-16
Categorylogic    logic   
File Size260KB,9 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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74VHC112MX Overview

Logic Type: Type JK Additional Features: Differential Output 74VHC Series 5.5 V Dual JK Flip Flop with Preset and Clear - SOIC-16

74VHC112MX Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
package instructionSOP, SOP16,.25
Manufacturer packaging code751BG
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time1 week
seriesAHC/VHC
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length9.9 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Sup110000000 Hz
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2/5.5 V
Prop。Delay @ Nom-Sup12 ns
propagation delay (tpd)16.5 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width3.9 mm
minfmax135 MHz
Base Number Matches1

74VHC112MX Related Products

74VHC112MX
Description Logic Type: Type JK Additional Features: Differential Output 74VHC Series 5.5 V Dual JK Flip Flop with Preset and Clear - SOIC-16
Brand Name ON Semiconductor
Is it lead-free? Lead free
Maker ON Semiconductor
package instruction SOP, SOP16,.25
Manufacturer packaging code 751BG
Reach Compliance Code compliant
ECCN code EAR99
Factory Lead Time 1 week
series AHC/VHC
JESD-30 code R-PDSO-G16
JESD-609 code e3
length 9.9 mm
Load capacitance (CL) 50 pF
Logic integrated circuit type J-K FLIP-FLOP
Maximum Frequency@Nom-Sup 110000000 Hz
MaximumI(ol) 0.008 A
Humidity sensitivity level 1
Number of digits 2
Number of functions 2
Number of terminals 16
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Output polarity COMPLEMENTARY
Package body material PLASTIC/EPOXY
encapsulated code SOP
Encapsulate equivalent code SOP16,.25
Package shape RECTANGULAR
Package form SMALL OUTLINE
method of packing TAPE AND REEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED
power supply 2/5.5 V
Prop。Delay @ Nom-Sup 12 ns
propagation delay (tpd) 16.5 ns
Certification status Not Qualified
Maximum seat height 1.75 mm
Maximum supply voltage (Vsup) 5.5 V
Minimum supply voltage (Vsup) 2 V
Nominal supply voltage (Vsup) 3.3 V
surface mount YES
technology CMOS
Temperature level INDUSTRIAL
Terminal surface Tin (Sn)
Terminal form GULL WING
Terminal pitch 1.27 mm
Terminal location DUAL
Maximum time at peak reflow temperature NOT SPECIFIED
Trigger type NEGATIVE EDGE
width 3.9 mm
minfmax 135 MHz
Base Number Matches 1
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