The resistors are constructed in a high grade ceramic body (aluminium oxide). Internal metal
electrodes are added at each end and connected by a resistive paste that is applied to the top
surface of the substrate. The composition of the paste is adjusted to give the approximate resistance
required and the value is trimmed to within tolerance by laser cutting of this resistive layer.
The resistive layer is covered with a protective coat. Finally, the two external end terminations are
added. For ease of soldering the outer layer of these end terminations is a Tin (lead free) alloy.
Features:
•
•
•
•
Small size and light weight
High reliability and stability
Reduced size of final equipment
High precision
Laser trimmed
Resistive
Element
Primary Layer
Termination
Application:
•
•
•
•
High accuracy DC-power supply
Digital multi-meter
Telecommunication,Computer and Automotive industry
Medical and military equipment
Protective Layer
Marking
Alumina Substrate
Construction of Chip-R
Quick Reference Data
Item
Series No.
Size code
Resistance Tolerance
Resistance Range
TCR (ppm/°C) 20°C to +155°C
1Ω to 1MΩ
TCR (ppm/°C) 20°C to -55°C
10Ω to 1MΩ
1Ω to 10Ω
Max. dissipation @ T amb = 70°C
Max. Operation Voltage (DC or RMS)
Max. Overload Voltage (DC or RMS)
Climatic category (IEC 60068)
Basic specification
Note:
1. This is the maximum voltage that may be continuously supplied to the resistor element, see “IEC publication 60115-8”
2. Max. Operation Voltage : So called RCWV (Rated Continuous Working Voltage) is determined by
RCWV = Rated Power × Resistance Value or Max. RCWV listed above, whichever is lower.
3. 0Ω
maximum resistance Rmax
%
15mΩ and rated current (0805)
%
4Amp; (0603)
%
2Amp
1/4 W
150V
300V
55/155/56
JIS C 5201-1:1998 / IEC 60068-2-58:2004
General Specification
MCWF08P
0805 (2012)
±1%, ±5%
0Ω,1Ω~ 1MΩ (E96+E24 series)
≤ ±100 ppm/°C
≤ ±100 ppm/°C
≤ ±150 ppm/°C
1/8 W
50V
100V
MCWF06P
0603(1608)
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Page <1>
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High Power Chip Resistor
Mechanical Data
Protective Coat
End Termination
Resistive Layer
Ceramic Substrate
Protective Coat
Part Number
L
W
T
Tb
Tt
MCWF08P
2 ± 0.1
1.25 ± 0.1
0.5 ± 0.15
0.4 ± 0.2
0.4 ± 0.2
MCWF06P
1.6 ± 0.1
0.8 ± 0.1
0.45 ± 0.15
0.3 ± 0.15
0.3 ± 0.1
Dimensions : Millimetres
Marking
Each resistor is marked with a three-digit (MCWF06P ±1%; ±5%; MCWF08P ±5%) or four-digit (MCWF08P ±1%) code on the
protective coating to designate the nominal resistance value.
Example:
01Y = 1Ω (0603 ±1%); 103 = 10kΩ (0603 ±5%)
1002 = 10kΩ (0805 ±1%); 102 = 1kΩ (0805 ±5%)
Functional Description:
Product characterization
Standard values of nominal resistance are taken from the E96&E24 series for resistors with a tolerance of ±1%,±5%. The
values of the E96/E24 series are in accordance with “IEC publication 60063”.
Derating
The power that the resistor can dissipate depends on the operating temperature.
Max. Dissipation in percentage of rated power
As a function of the ambient temperature
Mounting
Due to their rectangular shapes and small tolerances, Surface Mountable Resistors are suitable for handling by automatic
placement systems.
Chip placement can be on ceramic substrates and printed-circuit boards (PCBs).
Electrical connection to the circuit is by individual soldering condition.
The end terminations guarantee a reliable contact.
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Page <2>
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V1.0
High Power Chip Resistor
Soldering Condition:
The robust construction of chip resistors allows them to be completely immersed in a solder bath of 260°C for 10 seconds.
Therefore, it is possible to mount Surface Mount Resistors on one side of a PCB and other discrete components on the reverse
(mixed PCBs).
Surface Mount Resistors are tested for solderability at 235°C during 2 seconds. The test condition for no leaching is 260°C for
30 seconds. Typical examples of soldering processes that provide reliable joints without any damage are given in below figure.
Infrared soldering profile for Chip Resistors
Catalogue Numbers:
The resistors have a catalogue number starting with
MCWFXX
Size code
MCWF08 : 0805
MCWF06 : 0603
P
Type code
P : Power
0805 size = 0.25W
5% E24:
1002
Resistance code
F
Tolerance
J : ±5%
F : ±1%
P : Jumper
T
Packaging code
T : 7" Reeled taping
paper taping
5Kpcs/reel.
L
Termination
code
L
=
Sn base
(lead free)
2 significant digits followed
0603 size = 0.125W
by No. of zeros
e.g.:
3Ω =3R0
10Ω =100
56kΩ =563
1% E24+E96:
3 significant digits followed
by No. of zeros
100Ω = 1000
37.4kΩ = 3742
Reeled tape packaging : 8mm width paper taping 5,000 pcs per 7" reel.
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Page <3>
20/12/16
V1.0
High Power Chip Resistor
Test And Requirements
Basic specification : JIS C 5201-1 : 1998
Test
Clause 4.8
Temperature
Coefficient of
Resistance (TCR )
Procedure
Natural resistance change per change in degree
Centigrade.
R
2
- R
1
(ppm/°C)
× 10
6
R
1
(t
2
- t
1
)
R
1
: Resistance at reference temperature
R
2
: Resistance at test temperature
t
1
: 20°C +5°C -1°C.
Clause 4.13
Short time overload
Clause 4.18
Resistance to
soldering heat (R.S.H)
Clause 4.17
Solderability
Clause 4.19
Temperature cycling
5 × Rated power or Max. Overload Voltage for 5 sec.
Measure resistance after 30 minutes.
∆R/R
max. J :
%±(2%
+0.1Ω)
F :% ±(1% +0.05Ω)
Requirement
Refer to quick reference data for T.C.R
specification
No visible damage
Un-mounted chips completely immersed for 10±1second
∆R/R
max. J :
%
±(1% +0.1Ω)
in a SAC solder bath at 260°C ±5°C.
F :
%
±(0.5% +0.05Ω)
Un-mounted chips completely immersed for 2 ±0.5
second in a SAC solder bath at 235°C ±5°C.
1. 30 minutes at -55°C ±3°C,
2. 2~3 minutes at 20°C +5°C-1°C,
3. 30 minutes at +155° ±3°C,
4. 2~3 minutes at 20°C +5°C-1°C,
Total 5 continuous cycles.
1000 +48/-0 hours, loaded with RCWV or Vmax in
chamber controller 70±2ºC, 1.5 hours on and 0.5 hours
off.
1000 +48/-0 hours, loaded with RCWV or Vmax in
humidity chamber controller at 40°C±2°C and 90~95%
relative humidity, 1.5 hours on and 0.5 hours off.
Resistors mounted on a 90mm glass epoxy resin
PCB(FR4); bending : 3mm, once for 10 seconds.
Pressurizing force: 5N, Test time: 10±1sec.
Apply the maximum overload voltage (DC) for 1 minute.
Apply the maximum overload voltage (AC) for 1 minute.
Good tinning (>95% covered)
No visible damage
No visible damage
∆R/R
max. J
%
±(1%+0.1Ω)
F
%
±(0.5%+0.05Ω)
No visible damage
∆R/R
max. J
%
±(3%+0.1Ω)
F
%
±(1%+0.05Ω)
No visible damage
∆R/R
max. J
%
±(3%+0.1Ω)
F
%
±(1%+0.05Ω)
No visible damage
∆R/R
max. J
%
±(1%+0.1Ω)
F
%
±(0.5%+0.05Ω)
No remarkable damage or removal of
the terminations
R
^
10GΩ
No breakdown or flashover
Clause 4.25
Load life (endurance)
Clause 4.24
Load life in Humidity
Clause 4.33
Bending strength
Clause 4.32
Adhesion
Clause 4.6
Insulation Resistance
Clause 4.7
Dielectric Withstand
Voltage
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Page <4>
20/12/16
V1.0
High Power Chip Resistor
Packaging:
Paper Tape specifications
Series No.
MCWF06P
MCWF08P
Series No.
MCWF06P
MCWF08P
A
1.9 ±0.2
2.4 ±0.2
P1
4 ±0.1
B
1.1 ±0.2
1.65 ±0.2
P0
4 ±0.1
W
8 ±0.3
F
3.5 ±0.2
E
1.75 ±0.1
D
1.5
-0
+0.1
T
0.65 ±0.05
Max. 1
Dimensions : Millimetres
Reel dimensions:
A
Φ178 ±2
B
Φ60 ±1
C
13 ±0.2
D
9 ±0.5
Dimensions : Millimetres
Important Notice :
This data sheet and its contents (the “Information”) belong to the members of the Premier Farnell group of companies (the “Group”) or are licensed to it. No licence is granted
for the use of it other than for information purposes in connection with the products to which it relates. No licence of any intellectual property rights is granted. The Information is subject to change
without notice and replaces all data sheets previously supplied. The Information supplied is believed to be accurate but the Group assumes no responsibility for its accuracy or completeness, any
error in or omission from it or for any use made of it. Users of this data sheet should check for themselves the Information and the suitability of the products for their purpose and not make any
assumptions based on information included or omitted. Liability for loss or damage resulting from any reliance on the Information or use of it (including liability resulting from negligence or where the
Group was aware of the possibility of such loss or damage arising) is excluded. This will not operate to limit or restrict the Group’s liability for death or personal injury resulting from its negligence.
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Microcontroller MCU
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