EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

EDE1108AASE-4A-E

Description
DDR DRAM, 128MX8, 0.6ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68
Categorystorage   
File Size577KB,66 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
Environmental Compliance
Download Datasheet Parametric Compare View All

EDE1108AASE-4A-E Overview

DDR DRAM, 128MX8, 0.6ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68

EDE1108AASE-4A-E Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerELPIDA
Parts packaging codeBGA
package instructionTFBGA, BGA68,9X19,32
Contacts68
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
access modeMULTI BANK PAGE BURST
Maximum access time0.6 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)200 MHz
I/O typeCOMMON
interleaved burst length4,8
JESD-30 codeR-PBGA-B68
JESD-609 codee1
length20.7 mm
memory density1073741824 bit
Memory IC TypeDDR DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals68
word count134217728 words
character code128000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature
organize128MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Encapsulate equivalent codeBGA68,9X19,32
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)260
power supply1.8 V
Certification statusNot Qualified
refresh cycle8192
Maximum seat height1.12 mm
self refreshYES
Continuous burst length4,8
Maximum supply voltage (Vsup)1.9 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Silver/Copper (Sn/Ag/Cu)
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.2 mm
Base Number Matches1

EDE1108AASE-4A-E Related Products

EDE1108AASE-4A-E EDE1104AASE-5C-E EDE1104AASE-6C-E EDE1104AASE-4A-E EDE1108AASE-6C-E EDE1108AASE-5C-E
Description DDR DRAM, 128MX8, 0.6ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68 DDR DRAM, 256MX4, 0.5ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68 DDR DRAM, 256MX4, CMOS, PBGA68, LEAD FREE, FBGA-68 DDR DRAM, 256MX4, 0.6ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68 DDR DRAM, 128MX8, CMOS, PBGA68, LEAD FREE, FBGA-68 DDR DRAM, 128MX8, 0.5ns, CMOS, PBGA68, ROHS COMPLIANT, FBGA-68
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
Maker ELPIDA ELPIDA ELPIDA ELPIDA ELPIDA ELPIDA
Parts packaging code BGA BGA BGA BGA BGA BGA
package instruction TFBGA, BGA68,9X19,32 TFBGA, BGA68,9X19,32 TFBGA, BGA68,9X19,32 TFBGA, BGA68,9X19,32 TFBGA, BGA68,9X19,32 TFBGA, BGA68,9X19,32
Contacts 68 68 68 68 68 68
Reach Compliance Code unknown unknown unknown unknown unknown unknown
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Is Samacsys N N N N N N
access mode MULTI BANK PAGE BURST MULTI BANK PAGE BURST MULTI BANK PAGE BURST MULTI BANK PAGE BURST MULTI BANK PAGE BURST MULTI BANK PAGE BURST
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
I/O type COMMON COMMON COMMON COMMON COMMON COMMON
interleaved burst length 4,8 4,8 4,8 4,8 4,8 4,8
JESD-30 code R-PBGA-B68 R-PBGA-B68 R-PBGA-B68 R-PBGA-B68 R-PBGA-B68 R-PBGA-B68
JESD-609 code e1 e1 e1 e1 e1 e1
length 20.7 mm 20.7 mm 20.7 mm 20.7 mm 20.7 mm 20.7 mm
memory density 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit
Memory IC Type DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM DDR DRAM
memory width 8 4 4 4 8 8
Number of functions 1 1 1 1 1 1
Number of ports 1 1 1 1 1 1
Number of terminals 68 68 68 68 68 68
word count 134217728 words 268435456 words 268435456 words 268435456 words 134217728 words 134217728 words
character code 128000000 256000000 256000000 256000000 128000000 128000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
organize 128MX8 256MX4 256MX4 256MX4 128MX8 128MX8
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFBGA TFBGA TFBGA TFBGA TFBGA TFBGA
Encapsulate equivalent code BGA68,9X19,32 BGA68,9X19,32 BGA68,9X19,32 BGA68,9X19,32 BGA68,9X19,32 BGA68,9X19,32
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
power supply 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle 8192 8192 8192 8192 8192 8192
Maximum seat height 1.12 mm 1.12 mm 1.13 mm 1.12 mm 1.13 mm 1.12 mm
self refresh YES YES YES YES YES YES
Continuous burst length 4,8 4,8 4,8 4,8 4,8 4,8
Maximum supply voltage (Vsup) 1.9 V 1.9 V 1.9 V 1.9 V 1.9 V 1.9 V
Minimum supply voltage (Vsup) 1.7 V 1.7 V 1.7 V 1.7 V 1.7 V 1.7 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level OTHER OTHER OTHER OTHER OTHER OTHER
Terminal surface Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form BALL BALL BALL BALL BALL BALL
Terminal pitch 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED 50 NOT SPECIFIED 50 NOT SPECIFIED
width 10.2 mm 10.2 mm 10.2 mm 10.2 mm 10.2 mm 10.2 mm
Base Number Matches 1 1 1 1 1 1
Maximum access time 0.6 ns 0.5 ns - 0.6 ns - 0.5 ns
Maximum clock frequency (fCLK) 200 MHz 267 MHz - 200 MHz - 267 MHz
Common power symbols and their meanings
Power symbols, are you still confused? Commonly used power symbols are attached! In circuit design, there are always various power symbols, which often confuse people. Today, the editor has sorted out...
成都亿佰特 Switching Power Supply Study Group
EEWORLD University - Teach you how to learn LittleVGL
Teach you how to learn LittleVGL step by step : https://training.eeworld.com.cn/course/5682LittlevGL is a free and open source graphics library that provides everything you need to create embedded GUI...
桂花蒸 MCU
Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug.pdf
Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug...
雷北城 FPGA/CPLD
5. Common Emitter Amplifier Circuit
1. The structure of the triode, the relationship between the currents of each pole of the triode, the characteristic curve, and the amplification conditions. 2. The role of components, the purpose of ...
wang27349715 Analog electronics
CPLD technology and its application.pdf
CPLD technology and its application.pdf...
zxopenljx EE_FPGA Learning Park
FPGA Design and Implementation of HDLC Control Protocol.pdf
FPGA Design and Implementation of HDLC Control Protocol.pdfClear Format...
zxopenljx EE_FPGA Learning Park

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号