* This product is under development, is not qualified or characterized and is subject to
change without notice.
DESCRIPTION
The WV3HG2256M72AER is a 2x256Mx72 Double Data
Rate DDR2 SDRAM high density module based on 1Gb
DDR2 SDRAM components. This memory module consists
of eighteen stacks of 256Mx4 bit with 8 banks DDR2
Synchronous DRAMs in FBGA packages, two - 14 bit
registered buffers in BGA packages mounted on a 240-pin
DIMM FR4 substrate.
OPERATING FREQUENCIES
PC2-3200
Clock Speed
CL-t
RCD
-t
RP
* Consult factory for availability
PC2-4300
266MHz
4-4-4
PC2-5300*
333MHz
5-5-5
PC2-6400*
400MHz
6-6-6
200MHz
3-3-3
April 2006
Rev. 1
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PIN CONFIGURATION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
April 2006
Rev. 1
Symbol
V
REF
V
SS
DQ0
DQ1
V
SS
DQS0#
DQS0
V
SS
DQ2
DQ3
V
SS
DQ8
DQ9
V
SS
DQS1#
DQS1
V
SS
RESET#
NC
V
SS
DQ10
DQ11
V
SS
DQ16
DQ17
V
SS
DQS2#
DQS2
V
SS
DQ18
DQ19
V
SS
DQ24
DQ25
V
SS
DQS3#
DQS3
V
SS
DQ26
DQ27
V
SS
CB0
CB1
V
SS
DQS8#
DQS8
V
SS
CB2
CB3
V
SS
V
CCQ
CKE0
V
CC
BA2
NC
V
CCQ
A11
A7
V
CC
A5
Pin No.
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Symbol
A4
V
CCQ
A2
V
CC
V
SS
V
SS
V
CC
NC
V
CC
A10/AP
BA0
V
CCQ
WE#
CAS#
V
CCQ
CS1#
ODT1
V
CCQ
V
SS
DQ32
DQ33
V
SS
DQS4#
DQS4
V
SS
DQ34
DQ35
V
SS
DQ40
DQ41
V
SS
DQS5#
DQS5
V
SS
DQ42
DQ43
V
SS
DQ48
DQ49
V
SS
SA2
NC
V
SS
DQS6#
DQS6
V
SS
DQ50
DQ51
V
SS
DQ56
DQ57
V
SS
DQS7#
DQS7
V
SS
DQ58
DQ59
V
SS
SDA
SCL
Pin No.
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
Symbol
V
SS
DQ4
DQ5
V
SS
DM0/DQS9
NC/DQS9#
V
SS
DQ6
DQ7
V
SS
DQ12
DQ13
V
SS
DM1/DQS10
NC/DQS10#
V
SS
NC
NC
V
SS
DQ14
DQ15
V
SS
DQ20
DQ21
V
SS
DM2/DQS11
NC/DQS11#
V
SS
DQ22
DQ23
V
SS
DQ28
DQ29
V
SS
DM3/DQS12
NC/DQS12#
V
SS
DQ30
DQ31
V
SS
CB4
CB5
V
SS
DM8DQS17
NC/DQS17#
V
SS
CB6
CB7
V
SS
V
CCQ
CKE1
V
CC
NC
NC
V
CCQ
A12
A9
V
CC
A8
A6
Pin No.
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
Symbol
V
CCQ
A3
A1
V
CC
CK0
CK0#
V
CC
A0
V
CC
BA1
V
CCQ
RAS#
CS0#
V
CCQ
ODT0
A13
V
CC
V
SS
DQ36
DQ37
V
SS
DM4/DQS13
NC/DQS13#
V
SS
DQ38
DQ39
V
SS
DQ44
DQ45
V
SS
DM5/DQS14
NC/DQS14#
V
SS
DQ46
DQ47
V
SS
DQ52
DQ53
V
SS
NC
NC
V
SS
DM6/DQS15
NC/DQS15#
V
SS
DQ54
DQ55
V
SS
DQ60
DQ61
V
SS
DM7/DQS16
NC/DQS16#
V
SS
DQ62
DQ63
V
SS
V
CC
SPD
SA0
SA1
2
WV3HG2256M72AER-D6
ADVANCED
PIN NAMES
Pin Name
A0-A13
BA0,BA2
DQ0-DQ63
CB0-CB7
DQS0-DQS17
DQS0#-DQS17#
DM0-DM8
ODT0, ODT1
CK0,CK0#
CKE0, CKE1
CS0#, CS1#
RAS#
CAS#
WE#
RESET#
SA0-SA2
SDA
SCL
V
CC
V
CCQ
V
SS
V
REF
V
CC
SPD
NC
Function
Address Inputs
SDRAM Bank Address
Data Input/Output
Check Bits
Data strobes
Data strobes complement
Data Masks
On-die termination control
Clock Inputs, positive line
Clock Enables
Chip Selects
Row Address Strobe
Column Address Strobe
Write Enable
Register Reset Input
SPD address
SPD Data Input/Output
SPD Clock Input
Core Power
I/O Power
Ground
Power Supply for Reference
SPD Power supply
No connect
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WV3HG2256M72AER-D6
ADVANCED
FUNCTIONAL BLOCK DIAGRAM
VSS
RCS1#
RCS0#
DQS0
DQS0#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM0/DQS9
NC/DQS9#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ0
DQ1
DQ2
DQ3
DQS1
DQS1#
DQ8
DQ9
DQ10
DQ11
DQS2
DQS2#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ4
DQ5
DQ6
DQ7
DM1/DQS10
NC/DQS10#
CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
DM
CS# DQS DQS#
DM
CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ12
DQ13
DQ14
DQ15
DM2/DQS11
NC/DQS11#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ16
DQ17
DQ18
DQ19
DQS3
DQS3#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ20
DQ21
DQ22
DQ23
DM3/DQS12
NC/DQS12#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ24
DQ25
DQ26
DQ27
DQS4
DQS4#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ28
DQ29
DQ30
DQ31
DM4/DQS13
NC/DQS13#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ32
DQ33
DQ34
DQ35
DQS5
DQS5#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ36
DQ37
DQ38
DQ39
DM5/DQS14
NC/DQS14#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ40
DQ41
DQ42
DQ43
DQS6
DQS6#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ44
DQ45
DQ46
DQ47
DM6/DQS15
NC/DQS15#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ48
DQ49
DQ50
DQ51
DQS#7
DQS7#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ52
DQ53
DQ54
DQ55
DM7/DQS16
NC/DQS16#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DQ56
DQ57
DQ58
DQ59
DQS8
DQS8#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DQ60
DQ61
DQ62
DQ63
DM8/DQS17
NC/DQS17#
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
DM
CS# DQS DQS#
CB0
CB1
CB2
CB3
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
CB4
CB5
CB6
CB7
I/O 0
I/O 1
I/O 2
I/O 3
I/O 0
I/O 1
I/O 2
I/O 3
V
CCSPD
CS0#
CS1#
BA0-BA2
A0-A13
RAS#
CAS#
WE#
CKE0
CKE1
ODT0
ODT1
RESET#**
PCK7**
PCK7#**
Serial PD
DDR2 SDRAMs
DDR2 SDRAMs
DDR2 SDRAMs
1:2
R
E
G
I
S
T
E
R
RST#
RCS0# CS# : DDR2 SDRAMs
RCS1# CS# : DDR2 SDRAMs
RBA0-RBA2
BA0-BA2 : DDR2 SDRAMs
RA0-RA13
A0-A13 : DDR2 SDRAMs
RRAS#
RAS# : DDR2 SDRAMs
RCAS#
CAS# : DDR2 SDRAMs
RWE#
WE# : DDR2 SDRAMs
SCL
RCKE0
CKE : DDR2 SDRAMs
RCKE1
CKE : DDR2 SDRAMs
RODT0
ODT : DDR2 SDRAMs
RODT1
ODT : DDR2 SDRAMs
V
CC
/V
CCQ
V
REF
Serial PD
V
SS
SDA
WP A0
A1
A2
SA0 SA1 SA2
CK0
CK0#
RESET#**
P
L
L
OE
PCK0-PCK6, PCK8, PCK9
CK : DDR2 SDRAMs
CK# : DDR2 SDRAMs
PCK0#-PCK6#, PCK8#, PCK9#
PCK7
CK : Register
PCK7#
CK# : Register
NOTE: All resistor values are 22 ohms unless otherwise specified.
** RESET#, PCK7 and PCK7# connect to both registers. Other signals connect to one of two registers.
April 2006
Rev. 1
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
All Voltages Referenced to V
SS
Rating
Parameter
Supply Voltage
I/O Input Reference Voltage
I/O Termination Voltage
SPD Supply Voltage
Symbol
V
CC
V
REF
V
TT
V
CCSPD
Min.
1.7
0.49*V
CC
V
REF
-0.04
1.7
Type
1.8
0.50*V
CC
V
REF
—
WV3HG2256M72AER-D6
ADVANCED
RECOMMENDED DC OPERATING CONDITIONS
Max.
1.9
0.51*V
CC
V
REF
+0.04
3.6
Units
V
V
V
V
Notes
3
1
2
Notes:
1. VREF is expected to equal VCCQ/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed ±1 percent of the
DC value. Peak-to-peak AC noise on VREF may not exceed ±2 percent of VREF. This measurement is to be taken at the nearest VREF bypass capacitor..
2. V
TT
is not applied directly to the device. V
TT
is a system supply for signal termination resistors, is expected to be set equal to V
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WV3HG2256M72AER-D6
ADVANCED
OPERATING TEMPERATURE CONDITION
Parameter
Operating temperature (commercial)
Symbol
TOPER
Rating
0 to +85°C
Units
°C
Notes
1, 2
Notes:
1. Operating temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JEDED JESD51.2
2. At 0°C to +85°C, operation temperature range, all DRAM specification will be supported.
INPUT DC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Symbol
V
IH
(DC)
V
IL
(DC)
Min
V
REF
+ 0.125
-0.300
Max
V
CC
+ 0.300
V
REF
- 0.125
Units
V
V
INPUT AC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
AC Input High (Logic 1) Voltage DDR2-400 & DDR-533
AC Input High ( Logic 1) Voltage DDR2-667*
AC Input Low (Logic 0) Voltage DDR2-400 & DDR2-533
AC Input Low (Logic 0) Voltage DDR2-667*
* Consult factory for availability
Symbol
V
IH
(AC)
V
IH
(AC)
V
IL
(AC)
V
IL
(AC)
Min
V
REF
+ 0.250
V
REF
+ 0.200
-
-
Max
-
-
V
REF
- 0.250
V
REF
- 0.200
Units
V
V
V
V
April 2006
Rev. 1
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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