74AHC08PW,118 datasheet, PDF - EEWORLD Datasheet

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74AHC08PW,118: DescriptionIC GATE AND 4CH 2-INP 14TSSOP; Categorylogic logic; File Size606KB，14 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com

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74AHC08PW,118 Overview

IC GATE AND 4CH 2-INP 14TSSOP

74AHC08PW,118 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Maker	Nexperia
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	14
Manufacturer packaging code	SOT402-1
Reach Compliance Code	compliant
Factory Lead Time	4 weeks
Samacsys Description	74AHC(T)08 - Quad 2-input AND gate@en-us
series	AHC/VHC/H/U/V
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	5 mm
Logic integrated circuit type	AND GATE
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	15.5 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	4.4 mm

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74AHC08; 74AHCT08

Quad 2-input AND gate

Rev. 03 — 14 November 2007

Product data sheet

1. General description

The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL). They are speciﬁed in compliance with JEDEC

standard JESD7-A.

The 74AHC08; 74AHCT08 provides the quad 2-input AND function.

2. Features

Balanced propagation delays

All inputs have a Schmitt-trigger action

Inputs accepts voltages higher than V

For 74AHC08 only: operates with CMOS input levels

For 74AHCT08 only: operates with TTL input levels

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101C exceeds 1000 V

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

3. Ordering information

Table 1.

Ordering information

Package

Temperature range

74AHC08D

74AHCT08D

74AHC08PW

74AHCT08PW

74AHC08BQ

74AHCT08BQ

−40 °C

to +125

°C

−40 °C

to +125

°C

TSSOP14

−40 °C

to +125

°C

Name

SO14

Description

plastic small outline package; 14 leads;

body width 3.9 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

Version

SOT108-1

SOT402-1

SOT762-1

Type number

DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad ﬂat package; no leads; 14 terminals;

body 2.5

0.85 mm

74AHC08PW,118 Related Products

	74AHC08PW,118	74AHCT08BQ,115	74AHCT08PW,118	74AHCT08D,118	74AHC08BQ,115
Description	IC GATE AND 4CH 2-INP 14TSSOP	IC GATE AND 4CH 2-INP 14DHVQFN	IC GATE AND 4CH 2-INP 14TSSOP	Logic Type: AND Gate Additional Features:-
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Maker	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	TSSOP	QFN	TSSOP	SOIC	QFN
package instruction	TSSOP,	HVQCCN,	TSSOP,	SOP,	HVQCCN,
Contacts	14	14	14	14	14
Manufacturer packaging code	SOT402-1	SOT762-1	SOT402-1	SOT108-1	SOT762-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
Samacsys Description	74AHC(T)08 - Quad 2-input AND gate@en-us	74AHC(T)08 - Quad 2-input AND gate@en-us	74AHC(T)08 - Quad 2-input AND gate@en-us	74AHC(T)08 - Quad 2-input AND gate@en-us	74AHC(T)08 - Quad 2-input AND gate@en-us
series	AHC/VHC/H/U/V	AHCT/VHCT/VT	AHCT/VHCT/VT	AHCT/VHCT/VT	AHC/VHC/H/U/V
JESD-30 code	R-PDSO-G14	R-PQCC-N14	R-PDSO-G14	R-PDSO-G14	R-PQCC-N14
JESD-609 code	e4	e4	e4	e4	e4
length	5 mm	3 mm	5 mm	8.65 mm	3 mm
Logic integrated circuit type	AND GATE	AND GATE	AND GATE	AND GATE	AND GATE
Humidity sensitivity level	1	1	1	1	1
Number of functions	4	4	4	4	4
Number of entries	2	2	2	2	2
Number of terminals	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	HVQCCN	TSSOP	SOP	HVQCCN
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260	260	260
propagation delay (tpd)	15.5 ns	10 ns	10 ns	10 ns	15.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1 mm	1.1 mm	1.75 mm	1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	4.5 V	4.5 V	4.5 V	2 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	NO LEAD	GULL WING	GULL WING	NO LEAD
Terminal pitch	0.65 mm	0.5 mm	0.65 mm	1.27 mm	0.5 mm
Terminal location	DUAL	QUAD	DUAL	DUAL	QUAD
Maximum time at peak reflow temperature	30	30	30	30	30
width	4.4 mm	2.5 mm	4.4 mm	3.9 mm	2.5 mm
Factory Lead Time	4 weeks	-	-	4 weeks	8 weeks

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